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EDA => General PCB/EDA/CAD Discussions => Topic started by: shadewind on August 02, 2011, 12:52:52 pm

Title: Tented vias - when to use?
Post by: shadewind on August 02, 2011, 12:52:52 pm
What are the advantages and disadvantages of tented vias? When should I use tented vias and when shouldn't I? What if the vias are only for thermal purposes?
Title: Re: Tented vias - when to use?
Post by: joelby on August 02, 2011, 01:29:39 pm
If you don't want solder to be drawn into the via hole, tenting can help prevent it. If your vias are running underneath something conductive, you can tent them.

The Screaming Circuits Blog (http://blog.screamingcircuits.com/ (http://blog.screamingcircuits.com/)) contains many posts on vias and manufacturability and is well worth a read.
Title: Re: Tented vias - when to use?
Post by: mikeselectricstuff on August 02, 2011, 02:12:50 pm
I default to using tented vias on the basis that you don't normally need them uncovered. The only reason for not doing it is if you want to be able to use them for test points (or bodge wire conneciton points), although I generally use specific pad types.

For an all SMD assembly it makes little difference, but if the board is flow-soldered, untented vias can add to the number of places that could short due to solder bridges.
Title: Re: Tented vias - when to use?
Post by: luky315 on November 26, 2013, 12:21:11 pm
Tented Vias can cause long term problems because residuals of the processing chemicals COULD remain in the hole and cause problems. I've seen nasty things...
Title: Re: Tented vias - when to use?
Post by: poorchava on November 26, 2013, 01:17:11 pm
Also if you are using some sort of potting or coating that is supposed to be only on one side, the tenting prevents the coating from getting to the other side, which is sometimes unwanted (although for this purpose vias are often plugged, because tenting alone is not strong enough).

Another thing: prototype PCB services usually deal poorly with tenting. Chinese guys (itead, elecrow and such) usually get some vias right (=tented) and some not, even when specifying minimal hole size allowed. I think this is because the soldermask they are using is a thin liquid prior to curing and drips through the via or collapses when it's being cured.
Title: Re: Tented vias - when to use?
Post by: NANDBlog on November 26, 2013, 02:34:05 pm
I always use tented vias, they should be tented from both sides. Via is not the place for testpoint, and it should be covered with soldermask. Both sides. And correctly sized vias.
The only place where I consider untented vias is high current traces.
Title: Re: Tented vias - when to use?
Post by: VK3DRB on January 31, 2014, 01:54:34 pm
Tented Vias can cause long term problems because residuals of the processing chemicals COULD remain in the hole and cause problems. I've seen nasty things...

In the days of corrosive fluxes this was quite true. Not so much nowadays.
Title: Re: Tented vias - when to use?
Post by: lorth on January 31, 2014, 07:01:23 pm
Another thing: prototype PCB services usually deal poorly with tenting. Chinese guys (itead, elecrow and such) usually get some vias right (=tented) and some not, even when specifying minimal hole size allowed. I think this is because the soldermask they are using is a thin liquid prior to curing and drips through the via or collapses when it's being cured.

And big companies like Advanced Circuits (had to return 2 batches of boards because of that) or Sierra Circuits (returned after they guaranteed full coverage, and it wasn't...). I was using it as a mechanical isolator, which is not a great of an idea but... specs.

In defense of Advanced Circuits though, they do say (after navigating every single document on their website, not easy to find) they don't fully cover the cooper unless specified ($$$)...

OSHpark does a MUCH MUCH better job tenting vias, usually all fully covered....