Electronics > PCB/EDA/CAD

Vertical/Horizontal tracks grid

(1/2) > >>

josuah:
I just came upon that design file from Silicon Labs, for their dev board.

While I am used to PCBs with tracks going from source to destination, these guys are using a different approach:

The top copper layer has traces going vertically only.
The bottom copper layer has traces going horizontally only.
And vias reach the dots.
There are very few exceptions.

That looked like a very pragmatic approach to PCB design that can solve most if not all wiring.

Is it a well-known method? Any advantage or downside you would see for it?
What is your opinion?

ataradov:
This is a standard method that was used since 1970s at least. This was used on all old computers full of DIP ICs. This is basically the first routing method after they were done using mylar sheets and black tape.

This looks like a job of a really basic autorouter. Or they went for a vintage look.

This is absolutely horrible for signal integrity. It probably does not matter on a board with slow ICs, but I would not use that as a universal method.

Look at USB routing. This is nuts. I assume USB here is full speed, so it does not matter, but this routing at high speed would be questionable.

Feynman:

--- Quote from: josuah on June 24, 2022, 03:08:20 am ---Is it a well-known method?

--- End quote ---
It is even an exceptionally well-known method :D

I don't see any downsides from this routing technique alone. General principles for signal integrity, power integrity, EMI, DFM and so forth apply to this technique as for every other technique, of course.

josuah:

--- Quote from: ataradov on June 24, 2022, 03:16:15 am ---This is a standard method that was used since 1970s at least. This was used on all old computers full of DIP ICs. This is basically the first routing method after they were done using mylar sheets and black tape.like a job of a really basic autorouter. Or they went for a vintage look.

--- End quote ---

This reminds me of these single-side PCBs with all tracks at the back, and plain wires soldered like THT components to jump over something else.


--- Quote from: ataradov on June 24, 2022, 03:16:15 am ---This is absolutely horrible for signal integrity. It probably does not matter on a board with slow ICs, but I would not use that as a universal method.

--- End quote ---

IIRC vias can introduce some noise https://www.nwengineeringllc.com/article/img/via-induct-3.png and this has a via for every single net.

As the T-Shirt says: https://farm6.staticflickr.com/5582/14248405503_a47ed6bb0f.jpg

As Feynman says, it does not prevent to keep an eye on...


--- Quote from: Feynman on June 24, 2022, 09:37:40 am ---General principles for signal integrity, power integrity, EMI, DFM and so forth

--- End quote ---


--- Quote from: ataradov on June 24, 2022, 03:16:15 am ---Look at USB routing. This is nuts.

--- End quote ---

This is a track hide and seek party!

Thank you for sharing your seasoned feedback on it to me freshman.

Doctorandus_P:
The attached picture is only of one side of an old TTL PCB, but you can guess what the other side would look like  8)

The tracks on this side are also not completely vertical, but by allowing some small bends the number of via's is reduced quite a bit. Also note that power (and GND) is also routed in the same pattern.

Navigation

[0] Message Index

[#] Next page

There was an error while thanking
Thanking...
Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod