Electronics > PCB/EDA/CAD

Via and ground plane question

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redkitedesign:

--- Quote from: bpiphany on December 07, 2022, 07:54:40 am ---In a 4-layer stack-up if you have signal-gnd-power-signal layers, the traces on the gnd side will have their return path directly underneath in the gnd layer, but the traces on the power side won't.

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I don't buy it. The gnd plane may be 0.3mm further away for the top layer signals, but its still there. That 0.3mm difference wont matter compared to a larger loop around a component in your power distribution because you don't have a power plane.


--- Quote from: Doctorandus_P on December 07, 2022, 08:05:38 am ---
--- Quote from: redkitedesign on December 07, 2022, 04:07:51 am ---
Nope. The current in the ground net is (by definition, Kirchhoffs Current Law) the same as in the power net. Or, a different view but the same result: Every electron that goes into the power supply (at the positive terminal!) has to come out at the negative terminal (ground). Conservation of Mass is a nice law there.

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No it's not.  Kirchhoff deals with a single loop at a time, not with a whole net.
The decoupling capacitors filter out most of the high frequency content of the current from the power delivery system (i.e. cables to the PCB)
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Kirchhoff still applies. Every net is a combination of an finite number of loops.  Decoupling caps make smaller loops for AC current, but any current from the gnd plane into the cap also flows in the power net at the other side of the cap. Thats how caps work, the current at both sides is always the same.

If you can safely reduce your power net to a simple trace by careful use of caps, you can also reduce your ground net to a trace.


--- Quote ---Conservation of mass? Electrons don't have much mass. I guess it even depends on their speed too (although drift speed due to current is low).

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they have (rest-)mass. Thus conservation of mass applies.
Same for charge, if a power supply would deliver more electrons to the load than the load returns (which is what happens if there is more current in the ground plane then in the power trace) the power supply would get charged. That doesn't happen.


--- Quote ---The GND plane is also the reference for all signal tracks.
Above a few kHz the main impedance of any track is the loop inductance, and not the DC resistance, and above those frequencies minimizing the loop inductance is the main goal, and that is done by putting a GND track directly below each signal track.
And to avoid getting mad, this is simplified in practice to a full GND plane. A 4 layer PCB (with internal GND layer(s)) has the additional advantage that the GND plane is much closer to the tracks. It goes from approx 1.5mm (the PCB thickness) to 0.1mm or so. so a factor of 10 reduction in the loop inductance.

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Every signal is driven by a push-pull pair. Whenever that signal is positive, the current comes from the positive power supply. Thus the loop is not through ground, bu through power.
Decoupling capacitors help to redirect the AC part of that current through ground, but in effectively you are putting a cap in series with your signal.

Proper power planes prevent that series cap.

bpiphany:

--- Quote from: redkitedesign on December 08, 2022, 02:11:28 am ---...

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I suggest you watch the videos and come back after.

hozone:
Thanks all.
I found that this topic is not as simple as I belive some days ago when I ask my first question.
I'm watching a lot of videos, my sources at present are:
+ Altium academy
+ Robert Feranec
+ Phil’s Lab

I think Robert channel is the most exaustive, but even not simpler to understaind, it takes time and studies... but it's thing I've to work on.

Now I have more questions in mind.
Copper pour or not?
Split plane?
Gnd plane?

Up to now it seems to me this 4 layer stack is the most used
SIG/PWR
GND
GND
SIG/PWR
With a single GND.
But I have more than one GND, so I've to investigate further.


--- Quote from: eb4fbz on December 07, 2022, 07:15:13 pm ---2 Layer boards are the real evil. 4 Layer are not much better if 1.6mm, not so bad if 0.8mm thick. For mixed signal boards with more than 1 power net I would suggest you to change to 6 layers.

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What stack do you suggest?

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