Via sizes for 0.75 pitch for 541 pin BGA

[ziggyfish]

Hi,

I am working on a PCB layout for a design which includes a 0.75mm pitch BGA. My via size and solder mask expansion should I use?

I also have a 0.5 pitch BGA memory chip as well on the same board.

[T3sl4co1l]

I hope your PCB budget is relatively large...

That's probably in the domain of laser drilled microvias, or HDI.  Soldermask: probably LDI.

I imagine, 6 or 8 layers?

Tim

[ziggyfish]

I hope your PCB budget is relatively large...

That's probably in the domain of laser drilled microvias, or HDI.  Soldermask: probably LDI.

I imagine, 6 or 8 layers?

Tim

Yeah, it needs at least 6 layers for the DDR3 interface anyway.

Anyway, I am reading through, IPC-7095B (2008). This should answer my question.

Thanks

Brendan

[Daixiwen]

check with your PCB manufacturer what they can do before you are too deep in the layout phase. They usually have DRC tables such as this one that give you minimum pad diameter and clearance value so that you can plan your fan out accordingly. The price goes up with the classification of course so if what you planned is almost at the limit of a classification it can pay off to adjust just under the limit and go down one class.
If you need to do via in pads you need also to check with both the PCB manufacturer and the facility doing the soldering. You'll probably have to use filled vias to avoid soldering problems.

[dmills]

Xilinx have a very useful guide to escape routing strategy for large fine pitch BGAs, nothing at 0.75 but they show a 0.8mm part.

https://www.xilinx.com/support/documentation/user_guides/ug1099-bga-device-design-rules.pdf

With a suitably fine pitch capable board house you might be able to avoid filled and plated via in pad, but it is going to be painfully close.

Regards, Dan.

[daveshah]

I've done 1.0mm, 0.8mm and partial (i.e. some missing balls) 0.65mm BGAs on fairly readily available 4/4 mil track/space with 0.2mm drill process, for one design without any DDR3 I managed 4 layers; for a design with DDR3 and many other high speed signals I needed 8 layers.