Electronics > PCB/EDA/CAD

What do you think of my PCB design?

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digsys:

--- Quote --- missing out bypass caps! Teacher says not to bother adding them ... Does anyone else have an issue with this
--- End quote ---
The teacher is full of KAKA. For a few lousy cents, it pretty much guarantees you WON'T have noise in / out issues in ANY
enviroment. Besides, once there are HC CMOS parts involved, it's a GIVEN, not an option. I've had MANY instyances of
intermittent faults traced back to insufficient decoupling !! And these are hard to pick somtimes, because .. " .. well it worked fine
for ages, but suddenly it's playing up ... " I often heard. It's part of best practice, and may even be an EMI issue anyway !!

alm:

--- Quote from: digsys on June 14, 2012, 10:44:30 pm ---
--- Quote --- Note that slow in this case means up to a few GHz. I would definitely recommend against right angle bends in microwave designs
--- End quote ---
Not JUST GHz stuff. ANYTHING in the 50s+ MHz region is a WHOLE new ball game anyway, you need to pay a LOT more attention to track layouts.
GHz stuff is another voodoo entirely !! I've worked on GPS receivers ... yechh
I'm talking fast risetimes and standing waves issues. These happen at any data rate, and are more pronounced with faster chips ie HC
If you USE best practice ALL the time, irrespective whether it's necessary or not on a design, it a GOOD thing. Haven't even strated on EMI
emissions with right-angle tracks.

--- End quote ---
One (I believe) Japanese study measured the EMI effects of right angle bends and found them to be insignificant. Same for the impedance mismatch (less then the tolerance in track width using standard PCB processes I think). I don't remember what frequencies/edge rates they used, but it was much faster than 50 MHz. This is consistent with Howard Johnson's opinion on right angle bends.

codeboy2k:

--- Quote from: Psi on June 14, 2012, 08:42:07 pm ---
--- Quote from: Christopher on June 14, 2012, 03:14:34 pm ---missing out bypass caps! Teacher says not to bother adding them

--- End quote ---
Does anyone else have an issue with this.

--- End quote ---
Yes. I do.


--- Quote from: digsys on June 14, 2012, 10:52:12 pm ---
--- Quote --- missing out bypass caps! Teacher says not to bother adding them ... Does anyone else have an issue with this
--- End quote ---
The teacher is full of KAKA. ...

--- End quote ---
The teacher is definitely giving you bad advice. Ask your teacher about SSO (simultaneously switching outputs) . 

Let's analyze. Assume one shift register is displaying a digit 8. (with the DP) ..  all the LED's are turned on, the device output ports are 11111111.

now, remember, all LED's will have a small capacitance, about 20pF maybe.

So you have a logic 1 out of the device, on each QA-QH, through a resister, charging a capacitor that is grounded through the common cathode. It won't take very long to fully charge the LED capacitance.

Now, at this point in time, assume you shift in all 00000000 to this device.  Now you have 8 bits that used to be logic 1, all switching to logic 0 at the same time. This is called a Simultaneously Switching Output (SSO), and is evil for EMI and ground bounce.. here's why.. When all 8 I/O pins switch from logic 1 to logic 0, this will quickly discharge all the LED capacitance through the device I/O pins, into the device, and out to ground via the device ground pin. Every single PCB trace, external device, bond wire, metalization, I/O pin, ground pin, solder pad, etc. from the LED capacitance to the ground (going through the device) will add a small inductance, and that inductance will cause the ground (as seen by the device!) to bounce quickly and return to zero at each switching of the outputs. And you don't need to be switching all 8 I/O's at once, even half as many, or even one, but the point is the LED display will be updating fast and switching shift register outputs fast and simultaneously.

This is ground bounce, and the di/dt of this bounce is what actually causes EMI. The bounce itself causes problems inside the device, because the device's view of the ground changes (i.e. ground comes up above ground momentarily)  This will often causes a small Vcc sag was well. 

The result of the ground bounce is that inside the device, signals that are normally referenced to ground can be misinterpreted because the ground is changing.

Bypass capacitors can provide the momentary current surge needed during the hi di/dt of the discharging capacitance (from the I/O pin to ground).

Now, you may get lucky and never run into a problem if you don't use bypass capacitors. But you will almost guarantee no problems when you do.

And that's why your teacher is full of kaka. :)

digsys:

--- Quote --- One (I believe) Japanese study measured the EMI effects of right angle bends and found them to be insignificant. Same for the impedance mismatch (less then the tolerance in track width using standard PCB processes I think). I don't remember what frequencies/edge rates they used, but it was much faster than 50 MHz. This is consistent with Howard Johnson's opinion on right angle bends
--- End quote ---
Luckily I don't rely on "other" peoples opinions much the time :-)  (but I DO study other peoples results, and if possible, test them).
40+ yrs of PCB design and my trusty high end Lecroys with FFT and EMI analysis show me otherwise.
I spent half my life fixing up "other people's opinions" :-) .. and failure analysis, sometimes in court.
There's never a shortage of opinions and studies ... evaluate them, and in the end YOU (OP) chose.

jahonen:

--- Quote from: digsys on June 15, 2012, 11:10:05 am ---
--- Quote --- One (I believe) Japanese study measured the EMI effects of right angle bends and found them to be insignificant. Same for the impedance mismatch (less then the tolerance in track width using standard PCB processes I think). I don't remember what frequencies/edge rates they used, but it was much faster than 50 MHz. This is consistent with Howard Johnson's opinion on right angle bends
--- End quote ---
Luckily I don't rely on "other" peoples opinions much the time :-)  (but I DO study other peoples results, and if possible, test them).
40+ yrs of PCB design and my trusty high end Lecroys with FFT and EMI analysis show me otherwise.
I spent half my life fixing up "other people's opinions" :-) .. and failure analysis, sometimes in court.
There's never a shortage of opinions and studies ... evaluate them, and in the end YOU (OP) chose.

--- End quote ---

If 90 degree turns are actually a bad thing, then how can we use any vias in a PCB? I remind you that we have not only one, but two 90 degree turns in each via we use :P

http://www.signalintegrity.com/Pubs/edn/bigbadbend.htm

Regards,
Janne

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