Author Topic: World's worst QFN  (Read 2539 times)

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Online ebastler

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Re: World's worst QFN
« Reply #25 on: February 04, 2020, 01:47:15 pm »
Rookie complain, those chips were meant for vertical mounting.   ;D

We had this picture before (https://www.eevblog.com/forum/chat/qfn-dead-bug/msg2338626/#msg2338626), but I have not figured out the original source yet. Google image search finds various Twitter posts and other obscure channels. "PS3 hacking" is mentioned somewhere. Does anyone know where/when/why/by whom this was done?

Edit: Ah, this seems close to the source:
https://www.psdevwiki.com/ps3/Syscon_Hardware


« Last Edit: February 04, 2020, 01:48:52 pm by ebastler »
 

Offline Berni

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Re: World's worst QFN
« Reply #26 on: February 04, 2020, 03:34:19 pm »
Why don't chip manufacturers make CAD libraries? Cause its not so simple to do.

Yes there are importers that will convert files between different CAD tools but the result is usually horrible and needs a good bit of manual fixing to make it exactly like a natively drawn symbol/footprint. There can also be some specifics about it, such as wave soldering optimized footprints. There are also sometimes certain styles of footprint design people like.. etc. When it comes to schematic symbols you might even draw them slightly differently depending on the use for it.

Tho some do it. For example Wurth Elektronik has Altium libraries for everything and i love it since they are actually well made and include 3D models and everything. Pretty useful stuff since weird inductors or special connectors can be annoying to draw.

For chips i don't really care anymore. Altium does a good job of making the process pretty quick. The chips are created using the built in standard IPC footprint generator where i just have to feed in some measurements and out pops a footprint complete with 3D model. When the chip is too funky to be supported i just chose the most similar chip type and then edit it manually after it auto-generates. So as long as the chip is not something like the horrendous abomination that the OP posted then i can make a footprint in a minute or two in Altium.

Similar goes for creating the symbol. For 6 pin chips placing the pins manually takes almost no time at all. When the chip has 100s of pins then i copy-paste the pinout table from the datasheet to excel, clean it up there and the copy paste the excel table into Altium so that it generates the pins for me automatically, all i have to do then is arrange them in a sensible way around the symbol. What gets me furious tho is when the datasheet presents the pins in a weird messed up pin table format that explodes into a mess of ASCII characters as soon as its copy pasted out of the PDF file. Tho FPGA vendors typically give you the pinout in excel format to begin with so its super easy to copy paste into Altium.

I still spend more time making my schematic look pretty than i spend making component libraries. So as long as the manufacturer gives me a easily copy pastable pinout table and a clear easy to read package drawing im happy (Tho quite a few don't).
 

Offline thm_w

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Re: World's worst QFN
« Reply #27 on: February 04, 2020, 10:12:17 pm »
Why don't chip manufacturers make CAD libraries? Cause its not so simple to do.

Sure, but you don't have to go all out. Could provide the pads drawn in DXF or equivalent common format and let people import it as needed. Have pad centers marked.
Or could even make a STEP file of the package, as many connector manufacturers have now. I think I've seen a few.

One issue is its no longer linked to the PDF. DXF/STEP/CSV embedded in PDF would be nice. Of course adobe has their own proprietary format, which is not relevant.
 

Offline Berni

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Re: World's worst QFN
« Reply #28 on: February 05, 2020, 06:14:50 am »
Sure, but you don't have to go all out. Could provide the pads drawn in DXF or equivalent common format and let people import it as needed. Have pad centers marked.
Or could even make a STEP file of the package, as many connector manufacturers have now. I think I've seen a few.

Yeah that would help with weird crazy packages.

However as soon as the package is similar to anything standard i find that its faster to set up the Altium footprint generator wizard than it is to place everything by hand onto a pre-drawn guide. The generator also makes a pretty good looking 3D step model of the chip according to the given measurements so im not so concerned with actual 3D models from manufacturers, worst case you can approximate a QFN or BGA chip with just a rectangular box.

But i have went this route before by importing the PDF drawing into Altium to use as a guide. This was only worth the effort when the thing i was drawing the footprint for was a huge pain in the ass to draw. (Getting a PDF into Altium is not quite so straight forward since it needs to go trough DXF as intermediate)

Where i do need real 3D step models provided is connectors, buttons, enclosures... where the 3D model is actually of significant importance of figuring out if something will fit or is needed to design enclosure openings that fit. Some manufacturers STILL don't provide models for the stuff and this is what really annoys me. I have had cases where i was so desperate i started drawing my own model for a important part, but then found out i don't even have all the important dimensions from the drawing, so i had to use calipers on the physical part or scale the drawing to 1:1 and use it as a guide to guess missing dimensions. |O
 

Online exe

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Re: World's worst QFN
« Reply #29 on: February 05, 2020, 09:34:17 am »
Altium footprint generator wizard

I use different software, which doesn't have a wizard :(. So, I'd love to have ready components.

When I looked at Altium's circuit maker, there was a large database of components linked to octopart or something. Every single thing I needed for my designs was there. I wish every EDA had such a database.
 

Offline Pseudobyte

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Re: World's worst QFN
« Reply #30 on: February 06, 2020, 12:51:51 pm »
I use different software, which doesn't have a wizard :(. So, I'd love to have ready components.

When I looked at Altium's circuit maker, there was a large database of components linked to octopart or something. Every single thing I needed for my designs was there. I wish every EDA had such a database.

Just know that most of that content is community created and should not be trusted if you want a higher expectation that your design will be functional/manufacturable otherwise you may end up vertically mounting a QFN.
“They Don’t Think It Be Like It Is, But It Do”
 

Online blueskull

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Re: World's worst QFN
« Reply #31 on: February 06, 2020, 12:59:52 pm »
When I looked at Altium's circuit maker, there was a large database of components linked to octopart or something. Every single thing I needed for my designs was there. I wish every EDA had such a database.

I ALWAYS make my libraries, sometimes case by case for different projects.

There are tradeoffs for things such as reliability vs repairability vs size, and other similar ones.

Thus, to fulfill project requirements, I always do my own libraries.
 

Offline Daixiwen

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Re: World's worst QFN
« Reply #32 on: March 18, 2020, 01:40:05 pm »
And we got a prototype PCB!
I still wonder how well this will solder, but unfortunately we won't be able to test this before a while.
 

Offline thm_w

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Re: World's worst QFN
« Reply #33 on: March 18, 2020, 08:33:37 pm »
Whats up with the no soldermask?
 

Offline Daixiwen

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Re: World's worst QFN
« Reply #34 on: March 19, 2020, 08:19:46 am »
It's a product that will go to space, so no soldermask or silkscreen allowed. This makes the soldering more challenging, especially with those vias around.
 
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Online Fred27

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Re: World's worst QFN
« Reply #35 on: March 19, 2020, 08:51:20 am »
I'd never header that soldermask and silkscreen weren't use for space work. Why is that?

That also looks a bitch to debug with all the traces on inner layers.
 

Offline Daixiwen

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Re: World's worst QFN
« Reply #36 on: March 19, 2020, 09:56:01 am »
A lot of materials are prohibited to prevent outgassing in the vacuum.
My main concern with the soldering is that a good part of the solder will move to the vias and I don't know how much of it will stay on the pads.
And if we get a solder bridge under there it will be fun to fix  :scared:
 
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Online asmi

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Re: World's worst QFN
« Reply #37 on: March 24, 2020, 12:42:47 pm »
A lot of materials are prohibited to prevent outgassing in the vacuum.
My main concern with the soldering is that a good part of the solder will move to the vias and I don't know how much of it will stay on the pads.
You should've used via-in-pad to alleviate this problem - specifically copper-filled vias (as in resin-filled type a resin expands a bit more than copper and so pads can "buckle" a bit during extreme temp cycles). Since it's aerospace, a bit higher cost of that technology should not be a problem.

Offline Daixiwen

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Re: World's worst QFN
« Reply #38 on: March 25, 2020, 08:33:23 am »
It's a "low cost" space project so we have to make some choices ;)
Especially with the cubesats now there is some demand for electronics that are resilient enough to go to space for a few years, but not as expensive as the full space grade thing.
We do have vias in pads elsewhere on that PCB, but the vias for that PCB manufacturing process are bigger than the pads for that component.
If it doesn't solder well we may have to do as you say and put vias in pads there too, but with vias this size it will probably be costly.
I don't remember what the vias are filled with here, I'll have to check. IIRC another problem with resin filled vias for space is that if an air bubble is trapped in the resin, the via will explode when coming to the vacuum. Resins are also usually not allowed for outgasing reasons.
 


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