Products > Embedded Computing

RPi 4 / STM32 / ESP32 / Teensy 4 / RISC-V GAZPACHO

<< < (38/38)

brucehoult:

--- Quote from: coppice on November 25, 2019, 07:13:35 pm ---
--- Quote from: GeorgeOfTheJungle on November 25, 2019, 06:51:58 pm ---I had never seen a ┬ÁC do a jmp in zero cycles before.  :-+

--- End quote ---
There have been some DSP oriented controller cores which offered zero cycle loop overhead, just like most full on DSP cores.

--- End quote ---

The new ARMv8.1-M spec includes zero-overhead loops:

[attachimg=1]

We think there's a better way -- stay tuned :-)

Berni:
Oh that's neat. I had no idea that ARM could do that.

Do things like this get used by the C compiler when you write a for loop with a known length?

brucehoult:

--- Quote from: Berni on November 26, 2019, 06:17:07 am ---Oh that's neat. I had no idea that ARM could do that.

--- End quote ---

I'd expect it's going to be a year or two before they'll be shipping any cores that can do this.


--- Quote ---Do things like this get used by the C compiler when you write a for loop with a known length?

--- End quote ---

That will be extremely easy to add to gcc and llvm, yes.

Navigation

[0] Message Index

[*] Previous page

There was an error while thanking
Thanking...
Go to full version