PAE was just a windows issue, mostly for backwards compatibility.
The PAE *name* is an x86-specific thing (not Windows), but the concept is common across I'd think all modern CPUs.
For example in RISC-V land we have the following virtual memory modes:
sv32: supports a 4 GB virtual address space in a 16 GB (34 bit) physical address space, using a two-level page table. This is similar to PAE, except PAE used a 3-level page table to support a 36 bit (64 GB) physical address space.
sv39: supports a 39 bit (512 GB) virtual address space in a 56 bit physical address space, using a three-level page table.
sv48: supports a 48 bit (256 TB) virtual address space in a 56 bit physical address space, using a four-level page table.
As a comparison, early x86_64 supported 48 bit virtual and 40 bit physical address space, with the current page table format supporting a future limit of 64 bit virtual addresses in a 52 bit physical address space.
ARM also has a similar Large Physical Address Extension (LPAE) supporting up to a 44 bit physical address space from a 48 bit virtual address space (on ARMv8 obviously).