SAME54: manually disabling WDT?

[fearless]

Be careful what you ask for: you might just get it. 

In my last post, I asked how to enable the watchdog timer on the SAME54.  I seem to have succeeded, but all too well: when I try to erase the chip using the Segger J-Link, J-Link Commander reports that it times out after 4.158 seconds, which is suspiciously close to the 4096 mSec that the WDT is set to.

So my MCU is effectively bricked.  I suspect that the WDT is getting enabled at reset even though that wasn't my intention.  Can someone guide me through the steps of manually writing the NVM bits to disable the WDT? 

UPDATE: Looking at the NVM sector, 0x00804048 is the WDT Enabled byte and 0x00804049 is the WDT Always-On byte.  Those values are loaded at reset into the WDT register.  I used SEGGER J-Link Commander to reset those to 0 (their defaults), so theoretically they should be disabled.  But this didn't make a difference: erase still times out.

[ataradov]

When debugger is attached, the values in the user row are ignored. It is not really possible to brick those devices using regular actions.

And usually debuggers would reset the device on the first connect, so anything firmware did before the debugger got attached should not matter.

Something else is going on. If you have any CMSIS-DAP compliant debugger (you can make one from RP2040), then you can try my low level tool https://github.com/ataradov/edbg

Although if ALWAYSON was set at any point while device was powered, then I guess it would not be cleared. Read the user row and check what values are set. You can disable that bit in the UR and then power cycle the device.

Read the raw page data, some tools like to invert the meaning of bits (set/cleared vs written/erased). And you need to fully power cycle the device after the write, simple reset would not work.