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SDCC - error 129: pointer types incompatible
PKTKS:
I am having a hard time trying to figure why SDCC
is clashing on this struct
--- Code: ---const uc_p ccmrx[NUM_TIMERS]={
#ifdef NEED_TIMER_11_12
TIM1->CCMR1, /* for TIMER11 */
TIM1->CCMR2, /* for TIMER12 */
#endif
TIM1->CCMR3, /* for TIMER13 */ <-- at this line and all below
TIM1->CCMR4, /* for TIMER14 */
TIM2->CCMR1, /* for TIMER21 */
TIM2->CCMR2, /* for TIMER22 */
#ifdef NEED_TIMER_23
TIM2->CCMR3, /* for TIMER23 */
#endif
#ifdef NEED_TIMER_31_32
TIM3->CCMR1, /* for TIMER31 */
TIM3->CCMR2 /* for TIMER32 */
#endif
};
### Defined like
typedef unsigned char *uc_p;
typedef struct TIM1_struct
{
__IO uint8_t CCMR1; /*!< CC mode register 1 */
__IO uint8_t CCMR2; /*!< CC mode register 2 */
__IO uint8_t CCMR3; /*!< CC mode register 3 */
__IO uint8_t CCMR4; /*!< CC mode register 4 */
--- End code ---
Tried a lot of alternatives but nothing actually works.
Any clue welcome
If that is an SDCC BUG ... as well
Paul
Nominal Animal:
You're trying to initialize pointers to const from 8-bit values, and you don't notice because you're using a typedef to a pointer.
You want an immutable (const) array of pointers to (non-const) 8-bit __IO, i.e.
--- Code: ---__IO uint8_t *const ccmrx[] = {
#ifdef NEED_TIMER_11_12
&(TIM1->CCMR1),
&(TIM1->CCMR2),
#endif
&(TIM1->CCMR3),
&(TIM1->CCMR4),
&(TIM2->CCMR1),
&(TIM2->CCMR2),
#ifdef NEED_TIMER_23
&(TIM2->CCMR3),
#endif
#ifdef NEED_TIMER_31_32
&(TIM3->CCMR1),
&(TIM3->CCMR2),
#endif
};
#define NUM_TIMERS (sizeof ccmrx / sizeof ccmrx[0])
--- End code ---
PKTKS:
Thanks for your attention.
This code comes from standard ST Standard Peripheral Library SPL
and that is the original form.
I tried to do just that in the very first place.. failed - same error
then tried to cast the array items with uint8_t
then tried another solution I found on the net in which same error is present
--- Code: ---struct _s { unsigned char STK[128]; };
static struct _s s;
void *v = (struct _s *)&s + 1;
--- End code ---
The above hack came from folks which found such weird error
Tried to redefine the struct and use (struct TIM1_struct *)
but it gets even worst.. all the casts I tried to dereference the array item failed..
Rather curious because the struct TIM1_struct should be a valid clause
Nevertheless the compiler is unable even to use &TIM_struct
Same error appears
This code is not mine.
This is a STM8 core port to SDCC - using STM8F103F3 compiler options
here the flatten compiler command
--- Code: ---sdcc/build.11242/bin/sdcc
../hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c
../build_249910/core/wiring_digital.c-1.c.o
-MMD
-c
-Ddouble=float
-DUSE_STDINT
-D__PROG_TYPES_COMPAT__
--less-pedantic
-mstm8
-DSTM8S103
-DF_CPU=16000000L
-DARDUINO=10816
-DARDUINO_STM8S_BLUE
-DARDUINO_ARCH_STM8
-I.arduino15/packages/sduino/hardware/stm8/0.5.0/cores/sduino
-I.arduino15/packages/sduino/hardware/stm8/0.5.0/variants/standard
-I.arduino15/packages/sduino/hardware/stm8/0.5.0/STM8S_StdPeriph_Driver/inc
-Isdcc/build.11242/share/sdcc/include
stm8/0.5.0/cores/sduino/wiring_digital.c-1.c
-o
build_249910/core/wiring_digital.c-1.c.o
--- End code ---
In theory if not a bug itself or no workaround available to recognize the struct addr
it can not compile that code...
Some other post I found may lead to a workaround but I could not do that so far..
e.g. I could find a way to write the hack properly..
Paul
Nominal Animal:
So, this is the STM8 core for Arduino?
The structures are defined in system/Drivers/STM8Sxx_StdPeriph_Driver/inc/stm8s.h. TIM1 type is struct TIM1_struct or TIM1_Typedef, but TIM1 is actually a preprocessor macro, ((TIM1_TypeDef *) TIM1_BaseAddress).
So, knowing this, the following should work for you:
--- Code: ---__IO uint8_t *const ccmrx[] = {
#ifdef NEED_TIMER_11_12
(__IO uint8_t *)&(TIM1->CCMR1),
(__IO uint8_t *)&(TIM1->CCMR2),
#endif
(__IO uint8_t *)&(TIM1->CCMR3),
(__IO uint8_t *)&(TIM1->CCMR4),
(__IO uint8_t *)&(TIM2->CCMR1),
(__IO uint8_t *)&(TIM2->CCMR2),
#ifdef NEED_TIMER_23
(__IO uint8_t *)&(TIM2->CCMR3),
#endif
#ifdef NEED_TIMER_31_32
(__IO uint8_t *)&(TIM3->CCMR1),
(__IO uint8_t *)&(TIM3->CCMR2),
#endif
};
--- End code ---
The test I used to verify the above should work is
--- Code: ---typedef unsigned char uint8_t;
#define __IO volatile
typedef struct TIM1_struct
{
__IO uint8_t CR1; /*!< control register 1 */
__IO uint8_t CR2; /*!< control register 2 */
__IO uint8_t SMCR; /*!< Synchro mode control register */
__IO uint8_t ETR; /*!< external trigger register */
__IO uint8_t IER; /*!< interrupt enable register*/
__IO uint8_t SR1; /*!< status register 1 */
__IO uint8_t SR2; /*!< status register 2 */
__IO uint8_t EGR; /*!< event generation register */
__IO uint8_t CCMR1; /*!< CC mode register 1 */
__IO uint8_t CCMR2; /*!< CC mode register 2 */
__IO uint8_t CCMR3; /*!< CC mode register 3 */
__IO uint8_t CCMR4; /*!< CC mode register 4 */
__IO uint8_t CCER1; /*!< CC enable register 1 */
__IO uint8_t CCER2; /*!< CC enable register 2 */
__IO uint8_t CNTRH; /*!< counter high */
__IO uint8_t CNTRL; /*!< counter low */
__IO uint8_t PSCRH; /*!< prescaler high */
__IO uint8_t PSCRL; /*!< prescaler low */
__IO uint8_t ARRH; /*!< auto-reload register high */
__IO uint8_t ARRL; /*!< auto-reload register low */
__IO uint8_t RCR; /*!< Repetition Counter register */
__IO uint8_t CCR1H; /*!< capture/compare register 1 high */
__IO uint8_t CCR1L; /*!< capture/compare register 1 low */
__IO uint8_t CCR2H; /*!< capture/compare register 2 high */
__IO uint8_t CCR2L; /*!< capture/compare register 2 low */
__IO uint8_t CCR3H; /*!< capture/compare register 3 high */
__IO uint8_t CCR3L; /*!< capture/compare register 3 low */
__IO uint8_t CCR4H; /*!< capture/compare register 3 high */
__IO uint8_t CCR4L; /*!< capture/compare register 3 low */
__IO uint8_t BKR; /*!< Break Register */
__IO uint8_t DTR; /*!< dead-time register */
__IO uint8_t OISR; /*!< Output idle register */
}
TIM1_TypeDef;
typedef struct TIM2_struct
{
__IO uint8_t CR1; /*!< control register 1 */
uint8_t RESERVED1; /*!< Reserved register */
uint8_t RESERVED2; /*!< Reserved register */
__IO uint8_t IER; /*!< interrupt enable register */
__IO uint8_t SR1; /*!< status register 1 */
__IO uint8_t SR2; /*!< status register 2 */
__IO uint8_t EGR; /*!< event generation register */
__IO uint8_t CCMR1; /*!< CC mode register 1 */
__IO uint8_t CCMR2; /*!< CC mode register 2 */
__IO uint8_t CCMR3; /*!< CC mode register 3 */
__IO uint8_t CCER1; /*!< CC enable register 1 */
__IO uint8_t CCER2; /*!< CC enable register 2 */
__IO uint8_t CNTRH; /*!< counter high */
__IO uint8_t CNTRL; /*!< counter low */
__IO uint8_t PSCR; /*!< prescaler register */
__IO uint8_t ARRH; /*!< auto-reload register high */
__IO uint8_t ARRL; /*!< auto-reload register low */
__IO uint8_t CCR1H; /*!< capture/compare register 1 high */
__IO uint8_t CCR1L; /*!< capture/compare register 1 low */
__IO uint8_t CCR2H; /*!< capture/compare register 2 high */
__IO uint8_t CCR2L; /*!< capture/compare register 2 low */
__IO uint8_t CCR3H; /*!< capture/compare register 3 high */
__IO uint8_t CCR3L; /*!< capture/compare register 3 low */
}
TIM2_TypeDef;
#define TIM1_BaseAddress 0x5250
#define TIM2_BaseAddress 0x5300
#define TIM1 ((TIM1_TypeDef *) TIM1_BaseAddress)
#define TIM2 ((TIM2_TypeDef *) TIM2_BaseAddress)
__IO uint8_t *const ccmrx[] = {
(__IO uint8_t *)&(TIM1->CCMR1),
(__IO uint8_t *)&(TIM1->CCMR2),
(__IO uint8_t *)&(TIM2->CCMR1),
(__IO uint8_t *)&(TIM2->CCMR2),
};
#define NUM_TIMERS (sizeof ccmrx / sizeof ccmrx[0])
--- End code ---
which is a self-contained version using system/Drivers/STM8Sxx_StdPeriph_Driver/inc/stm8s.h with four timers initialized in the array, and yields essentially the following .asm:
--- Code: --- .globl _ccmrx
.area CODE
_ccmrx:
.dw 0x5258
.dw 0x5259
.dw 0x5307
.dw 0x5308
--- End code ---
that matches my expectations for the contents of the _ccmrx array.
PKTKS:
Thanks again...
Yes core ported to STM8 for the IDE
At some point I tried that casting wo the volatile...
Tried again with volatile...
Same error
--- Code: ---
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:10: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:11: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:12: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:13: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:15: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:14: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:15: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:16: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:17: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:19: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:10: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:11: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:12: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:13: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-1.c:15: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:14: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:15: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:16: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:17: error 129: pointer types incompatible
sduino/hardware/stm8/0.5.0/cores/sduino/wiring_digital.c-2.c:19: error 129: pointer types incompatible
--- End code ---
What version of SDCC and option set have you tried to produce the ASM ?
I can easily change it.
Paul
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