Why is a PC so fast compared to BeagleBoard?

[Manx]

I have some code with trigonometric functions and matrix multiplications. Floating point calculations are single precision.

When I run one calculations cycle on 180 MHz STM32 F4, it takes 145 us.
When I run it on 1 GHz PocketBeagle Cortex A8 it takes 50us.
But when I run it on my laptop with 1.8 GHz 3rd gen Core i5, it takes 1.8 us.

Why?? It seems fine that Beagle is 3 times faster than STM32. But why is the laptop 30 times faster than Beagle, being only two times faster??

[ataradov]

Caches primarily, then effective branch prediction and speculative execution.

Compare the disassembled code. For matrix multiplication, compiler may have used SSE instructions on X86, which would make things multiple times faster right away.

[ogden]

Flash memory access alone acts like speedbrake for MCU, not to mention that embedded ARM cores are optimized for low power, not speed. Intel CPU's are heavily performance-optimized. - Deep pipelines, out of order execution, huge instruction and data cache memories. Why you think CPU of your laptop needs 35W of power? - Just to act like heater or what?

[coppice]

I suspect that either you have something odd in the compile options for the A8, and/or the Beagleboard is not running at 1GHz. Depending how you set up a Beagleboard, it may deault to a low clock rate, and require you to take action to push the clock rate up to 1GHz.  A Core i5 will be a lot faster than an A8, but the speed ratio you have seen is too big to be representative.

[ataradov]

It really depends on the generated code. X86 floating point instruction set is much better than A8 FP ISA.

[ogden]

I suspect that either you have something odd in the compile options for the A8, and/or the Beagleboard is not running at 1GHz.

It could be so. Stm32 results compared to Cortex A8 does not make sense as well.

[Manx]

I simply use

Code: [Select]

g++ -Ofast RobotKinematicsMCU.cpp -o test It's the same with

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g++ -Ofast -mcpu=cortex-a8 -mfloat-abi=hard -mfpu=neon  RobotKinematicsMCU.cpp -o test
When I check cpu frequency with

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cpufreq-info the governor is set to "performance" and 1 GHz is shown to be running all the time.

Basic question: How can I see disassembled code?

[rstofer]

It's even simpler than the explanations above:  Power - how much heat can you dissipate.  To switch in zero time takes infinite energy and, as switching speed increases, so does power.  Power also increases with complexity.  The more logic you have switching, the more power you need to deal with.

I bought a Raspberry Pi 4 - it's a pretty nice little machine.  I don't expect it to compete with my 4+ GHz I7-7700k water cooled tower.  There's a reason the Pi wall wart is 5V 3A (15 Watts) and my tower is around 500W.   That tower had better be faster than the Pi!

The speed power product (a measure of gate switching delay and gate power dissipation) is improving all the time.  I recall the VP of a company I worked for telling me to not bet against technology.  This was in the mainframe era and today my tower is faster and has more memory.

Yes, the architectural features matter but they all point toward increasing power dissipation.

[rstofer]

Basic question: How can I see disassembled code?

gcc -S ...

or study up on

objdump -d

[SiliconWizard]

Yeah. All good points. When doing such comparisons, you have to determine how much it is affected by memory/cache access times, and how much by the FPU itself.

And that said, I don't know much about the FPU of a Cortex A8. I would expect it not to put out as many operations per cycle on average than the FPU of a Core i5, but I may be wrong.

[Manx]

Thank you guys for your explanations. The main takeaway is then, that the results I got are to be expected. So I don't have to bother with moving to Beagle since the speed increase won't justify the effort. Fine with me But I must say, seeing such a big difference between Beagle and a laptop really surprised me. Well, but now I know.

[james_s]

When you say something is x times faster it sounds like you are looking only at the clock speed. There is a LOT more to the performance of a CPU than the clock speed. The number of cores, the architecture of the CPU and of the system as a whole and the peripherals around it have an enormous effect on performance. Clock speed doesn't really tell you much anymore, it only matters when comparing like to like.

[IanB]

No one has mentioned it yet, but the Intel processors in laptops have highly optimized floating point capabilities compared to simpler micros.

[ogden]

No one has mentioned it yet, but the Intel processors in laptops have highly optimized floating point capabilities compared to simpler micros.

In what sense Intel have highly optimized floating point capabilities compared to simpler micros (ARM Cortex A8)? BTW mentioned ARM have NEON SIMD tech which allows up-to 4*32bit parallel float operations. There's open source library http://projectne10.github.io/Ne10/

[rsjsouza]

Yeah. All good points. When doing such comparisons, you have to determine how much it is affected by memory/cache access times, and how much by the FPU itself.

And that said, I don't know much about the FPU of a Cortex A8. I would expect it not to put out as many operations per cycle on average than the FPU of a Core i5, but I may be wrong.

Assuming the code is actually oprimized and encoding the floating point instructions (and not emulated code), there'a another aspect: the FPU on an A8 shares its registers with its matrix math engine (NEON), thus reducing the performance of matrix operations that also use float. If you run the same on an A9 or A15 (BeagleBoard X15) you should have much more edge.

There was a wiki article at TI that talked about that. It is an inherent feature of the A8 cores, not only TI (IIRC).

(edit) I found the article. It is slightly different than I recall - the precision is limited with VFP+NEON
http://processors.wiki.ti.com/index.php/Using_NEON_and_VFPv3_on_Cortex-A8

[SiliconWizard]

Yet another point, and still related to memory access.

You will get significant performance penalty if the location in memory of the variables/arrays you are working on are not ideally aligned for the architecture in question. Ideal alignment depends a lot on the CPU architecture, and if not explicitely defined (through GCC attributes for instance) in code, can lead to very suboptimal results, which would not really reflect each CPU's capabilities.

All CPUs supporting some form of SIMD have specific alignment requirements to make the most of them.

[Berni]

Yep your beagleboard code is likely not that well optimized for the given hardware.

You need to look down into the instruction set what that CPU likes to do and make sure the C compiler does it in such a way. The NEON extensions can be very powerful for doing number crunching but will not tend to be used by the C compiler due to the careful memory layout needed for it to work.  The compiler is likely using the standard single cycle multiply function that you might find in a STM32F4. As for why its not as fast as the clock speed claims is likely because your data is stored in RAM in such a way that the CPUs data cache has trouble loading it efficiently.

When doing very repetitive math its also important what you have around your raw math operations, you can spend a lot of CPU time simply moving data around or shoveling it into the CPU registers to be worked on, or even just executing the for loop that is around it.

As for why Intel is so speedy its down to the superior parallel number crunching capabilities and its heavily pipelined execution that might shove multiple instructions trough the CPU core in a single clock cycle. The branch prediction might be working its magic on those repetitive loops, it has faster RAM and has a LOT more cache so all the data likely fits into its cache. Its also possible the C compiler does a better job at compiling your particular code implementation onto that instruction set.

If you need the speed then there are little Intel Atom single board computers out there. They won't quite have the performance of a i5/i7 at the same clock speed but its still gonna be pretty speedy while using a more reasonable amount of power.

[magic]

perf stat -d ./test

On all 3 platforms.

[Manx]

No much luck with perf. It says it won't work on my laptop because of the kernel version, and on Beagle it shows

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Performance counter stats for './test':

      48877.972638      task-clock:u (msec)       #    0.997 CPUs utilized         
                 0      context-switches:u        #    0.000 K/sec                 
                 0      cpu-migrations:u          #    0.000 K/sec                 
                77      page-faults:u             #    0.002 K/sec                 
   <not supported>      cycles:u                                                   
   <not supported>      instructions:u                                             
   <not supported>      branches:u                                                 
   <not supported>      branch-misses:u                                             
   <not supported>      L1-dcache-loads:u                                           
   <not supported>      L1-dcache-load-misses:u                                     
   <not supported>      LLC-loads:u                                                 
   <not supported>      LLC-load-misses:u                                           

      49.024961877 seconds time elapsed
The code is indeed not optimized for any specific platform. But a big part of the execution time, as I checked with pin toggling on STM32, is just spent on standard trigonometric functions. And I think that -Ofast does loop unrolling.

I quickly checked Intel Atom on google and it's probably a great thing, but I'm looking for something for which I can design my own board. Atom boards certainly don't look like anything close to that

[splin]

Take a look at http://gruntthepeon.free.fr/ssemath/neon_mathfun.html

comparing vector trigonometric performance  on ARM NEON and Intel Atom using their own optimized trig code. Fundamentally not much difference in cycles per operation.

They also tested their SSE2 implementation here:

http://gruntthepeon.free.fr/ssemath/

[rsjsouza]

Take a look at http://gruntthepeon.free.fr/ssemath/neon_mathfun.html

comparing vector trigonometric performance  on ARM NEON and Intel Atom using their own optimized trig code. Fundamentally not much difference in cycles per operation.

They also tested their SSE2 implementation here:

http://gruntthepeon.free.fr/ssemath/

Thanks for sending this, although the Pandaboard uses a dual Cortex A9 (OMAP4430), which does not have the same bottleneck as the A8.

Having the code, it is easy to migrate to a BeagelBone or X15 - I might do that next week just for kicks.

[NiHaoMike]

The Beaglebone is also quite old, so it's not going to perform particularly stellar even compared to other embedded Linux platforms like Raspberry Pi. It's still pretty unique in its capabilities, however, with its support for simultaneous USB host and device (not as big of a deal now with the Pi 4 also supporting that) and the I/O accelerator that, among other things, can be used as a logic analyzer.

[magic]

No much luck with perf.

That's indeed very little luck

The code is indeed not optimized for any specific platform. But a big part of the execution time, as I checked with pin toggling on STM32, is just spent on standard trigonometric functions. And I think that -Ofast does loop unrolling.

AFAIK trig functions are implemented by polynomial approximation so strictly CPU bound. Rather out of luck again, unless your standard library is completely inefficient garbage.
Perhaps some faster and slightly less accurate implementations can be found. Or find the relevant polynomials and roll your own, using SIMD to compute sinus of four numbers in parallel. These days they could frankly provide such stuff in standard libraries.

[rsjsouza]

The Beaglebone is also quite old, so it's not going to perform particularly stellar even compared to other embedded Linux platforms like Raspberry Pi.

I think the Pi4 is the only one that has a performance edge - the Pi3 versions are quite comparable in speed, no?

[NiHaoMike]

I think the Pi4 is the only one that has a performance edge - the Pi3 versions are quite comparable in speed, no?

The Beaglebone is a single core A8 while the Pi 3 is a quad core A53. What the Beaglebone has that the Pi doesn't is a pair of I/O accelerators that are essentially microcontrollers with fast access to the GPIO and RAM. That's what is used for the logic analyzer functionality.

The Odroid N2 is in a similar class as the Pi 4. Then there's the Jetson Nano, basically a lower end version of the Shield TV.