FPGA
Topics
[1] Verilog - elegant solution for variable width definition
[2] Xilinx Impact 10.1 incorrectly identifying SpartanII FPGA as VirtexE
[3] Simulating BRAM with lattice/aldec tools
[5] Gigabit Ethernet Example code
[6] Anyone played with these cheap ($50) Zynq boards
[7] High Level Discussion of Vitis
[8] What caused high spikes in FPGA market in 2000
[9] Constructive Criticism for SPI master Verilog Code needed!
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