FPGA

Spartan 6 production through 2030

Correctly handling clocks on a older Cyclone IV

Book on SMPTE SDI Protocol?

Development board with FPGA GW1N-LV9LQ144C6/I5

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Efinix toolchain is now free !!

[newbie] Doubt on verilog code

[Lattice Diamond] Which available simulator?

Low-end FPGA selection help

Parser for (Altera) FPGA programming files

FPGA in a toothbrush?

Multiplexing a pin for i2c signals and normal output signals

Being Stuck with Efinix

Capturing a JTAG programming stream

Does it exist Xilink Ultrascale courses not too expensive

Altium NanoBoard-NB1 without Altium Designer Software

Power on reset without a reset : ATF1504AS

EP2C5/EP2C8 Mini Board

Virtex-6 Partial reconfiguration

Help with Verilog vectors

Lattice CrossLink NX EVB Clocking w/higher speed clocks

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Sorting out 'Unbuffered IO' warnings for Lattice ICE40 Ultralite devices

Partial reconfiguration of FPGA on the fly

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Cyclone IV PLL not working correctly

USB3320 Device not able to detect with Zynq RFSoC

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Xilinx: interface microblaze to hard IP

Alternative for Lattice 4032ZE?

Quartus ALTFP_SQRT IP not working in simulation

Efinix Trion FPGA's

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Need driver for XUPV2P board

Gowin triple speed ethernet MAC. Trouble with tx data

Ideas on what type of JTAG device to purchase

Terasic DE5-NET

Interfacing peripherals that run on different clocks.

Simultaneous read/write with Quartus-|| single clock FIFOs

Trouble shooting ZCU111 RFSoC board

Loading FPGA configuaration from SPI flash

Disciplined signal clock to PPS

Zynq Quad SPI controller: has anyone used it successfully for non-flash devices?

New Verilog: Incrementing without getting continous assignment conflict