FPGA

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 ACTEL Activator 2S - APSW software needed

 EPM240 and boundary scan

 How to have a reset signal for a Sipeed/Tang verilog design?

 ECP5 SPI flash programming using open source tools

 Ise Would not detect XC6SLX45

 Anyone using Xilinx XC2k XC3k XC4k FPGAs?

 Programming (non-JTAG) MAX7000 devices

 Xilinx XCZU2EG - Flashing spi flash over jtag?

 where to get prehistoric SW for earliest (PALCE&GAL) PLDs ?

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