FPGA
Topics
[1] Xilinx DDR Controller Strange Behavior in Sim
[3] SD card/SDIO 3.0 level translation solution
[4] I need to get my head around timing (Xilinx)
[5] UART recommendation? Verilog/VHDL, supports 2 stop bits
[7] Calculateing the size of a pipeline vector
[8] Programming (non-JTAG) MAX7000 devices
[9] The Blair Witch story of my first FPGA devboard made from a printer front panel
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