FPGA
Topics
[2] UART recommendation? Verilog/VHDL, supports 2 stop bits
[3] Flash backed LLMs on FPGA?
[4] SD card/SDIO 3.0 level translation solution
[5] Programming (non-JTAG) MAX7000 devices
[6] Xilinx DDR Controller Strange Behavior in Sim
[8] I need to get my head around timing (Xilinx)
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