For any of those interested, I have published the board support files I have developed so far. There are Vivado board files, which includes all clocks, both DDR3 banks, both SFP+ connectors, QSPI flash, I
2C EEPROM, and GPIOs. There is also a master XDC constraints file, UCF files for MIG, and MIG project files for both DDR3 banks.
There is still work left to be done on the PCIe, QSFP and SATA interfaces. (If anyone knows of an open source SATA project with Linux support, please let me know.)
https://github.com/rriggs/kintex-7-hpc-v2-board-filesI have tested this by having Linux boot on a Microblaze (using buildroot), tested with both DDR3 banks, and using a 1000Base-X SFP adapter. Network support is still dodgy, but I think that's because either the Xilinx Ethernet IP lacks decent support for SFP adapters or their device-tree support does.
The schematics are also uploaded to this repo.
There is a second QSPI flash chip on the board labelled U30 which is not documented in the schematics. The vendor just responded with the connection information. I'll update the board files and master constraints file with this information soon.
I am fairly new to FPGAs so I'm sure there are a lot of things that can be improved. I am trying to learn, so any feedback would be greatly appreciated.
I plan to upload a sample MicroBlaze Linux project with buildroot configuration to Github next. I'd like to get the project in a more stable state first.