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Electronics => FPGA => Topic started by: pyrohaz on May 21, 2015, 11:38:22 pm

Title: Altera Quartus II ROM megafunction?
Post by: pyrohaz on May 21, 2015, 11:38:22 pm
Hey guys,

I'm making a simple VGA image displayer (only a 100x75 pixels at the moment, stored as RGB565 for native output format) and I've implemented VGA timing part and RAM access. The problem I have however is that when I compile my program, Quartus doesn't seem to include my memory block into my final project. Does anybody have any idea why?

Thanks,

Title: Re: Altera Quartus II ROM megafunction?
Post by: John_ITIC on May 22, 2015, 12:15:27 am
If you have not already, best post in alteraforum.com (http://alteraforum.com)

Normally, the compilation report shows in warnings/errors why various design modules are not included. Study it carefully and I'm sure the answer will be there.
Title: Re: Altera Quartus II ROM megafunction?
Post by: marshallh on May 22, 2015, 04:29:28 am
Read through ALL the warnings. Probalby your block is getting completely optimized away. Look upstream for missing clocks or connections.
Title: Re: Altera Quartus II ROM megafunction?
Post by: pyrohaz on May 22, 2015, 10:02:02 am
Quote from: John_ITIC on May 22, 2015, 12:15:27 am
If you have not already, best post in alteraforum.com (http://alteraforum.com)

Normally, the compilation report shows in warnings/errors why various design modules are not included. Study it carefully and I'm sure the answer will be there.

I'll post on the Altera forum too, thanks!

I've searched through my compilation messages and there seems to be nothing stating the memory block being removed through optimization. I'm sure its finding the file too as the design unit is being found at compilation.

Quote from: marshallh on May 22, 2015, 04:29:28 am
Read through ALL the warnings. Probalby your block is getting completely optimized away. Look upstream for missing clocks or connections.

In my VGA controller VHDL code, I've specified the address and data lines and connected them to the memory block using the block diagram schematic file pictured. I haven't however assigned these address and data lines in the pin planner. Do you think that could be the problem?
Title: Re: Altera Quartus II ROM megafunction?
Post by: John_ITIC on May 22, 2015, 09:16:35 pm
Quote from: pyrohaz on May 22, 2015, 10:02:02 am
I haven't however assigned these address and data lines in the pin planner. Do you think that could be the problem?

No. The fitter would normally just choose any free pins. You would get warnings for unassigned pins, though.
Title: Re: Altera Quartus II ROM megafunction?
Post by: pyrohaz on May 22, 2015, 09:49:48 pm
Quote from: John_ITIC on May 22, 2015, 09:16:35 pm
Quote from: pyrohaz on May 22, 2015, 10:02:02 am
I haven't however assigned these address and data lines in the pin planner. Do you think that could be the problem?

No. The fitter would normally just choose any free pins. You would get warnings for unassigned pins, though.

Yeah, I gathered that. It definitely gives warnings for unassigned pins but I still can't see anything about the memory megafunction. Maybe because its IP, I need to do additional work to getting it working other than just the megafunction wizard?