Electronics > FPGA

Anyone else misses jtag_loader?


Start-ups with recently designed boards are always tough, particularly when dealing with powerful FPGA or CPUs.
For the former, when designing with Xilinx ICs, PicoBlaze is definitely a great handly tool: it can warn you about high-temps, and pop-out communication errors,... all with "52 to 119 million instructions per second" + "the ability to operate at the same clock frequency as the hardware" + "4.3% of the smallest XC6SLX4 and just 0.11% of the XC6SLX150T".
Nevertheless, with the current so-powerful Vivado environment and 64-bit Wxx, the jtag_loader is not supported anymore. Yes, there are tricks here and there, but -as far as I know- is not the same.
On the other hand, I came across an interesting xapp1191 note when I was dealing with a multi-boot issue a couple of weeks ago. The note provides a tcl script with which a hex file is loaded from the PC to the FPGA... I wonder if anyone else may also see it as a starting point for a jtag_loader.tcl script that just "makes the job". The embedded jtag_loader vhdl code seems straightforward enough for -at least- give it a try!
Anyone agrees? I do think this could be the perfect scenario for such a tcl script...


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