Craig,
First ill say that I am just tossing out ideas, I am not a seasoned designer just a noob, hopefully others will add their expertise.
This is without knowing the size of the CPLD. Typically you describe your logic in, lets say VHDL, then choose a device that is capable.
Also it also looks like the device needs to be 5V compatible, or use level shifters.
I see you want a CIA like device, one serial, two parallel and some timers with an additional DAT. The DAT could be described as a dual port ram along with the other parts of the CIA.
For starters take a look at system09 on the opencores site. It has a 6850 serial, 2 parallel ports, some timers a DAT plus other stuff. Its in VHDL, and you can look at the sections to see what's involved in writing your CIA plus DAT. Word of caution, you can not just simply cut and paste the VHDL, its too intertwined, and its almost certain not to be timing correct for the 6309 buss. However it will give you an idea of what you'll need for a CIA w/ DAT in VHDL for your CPLD, or possibly a small FPGA. Your really not asking for that much.
Yes Coco 3, 8k pages, thanks SiliconWizard I forgot. And that brings up another point. The SWTPC uses a simple DAT that needs to be rewritten every time you want to switch pages. The GIMIX and Coco 3 use task registers, so once the DAT is configured you simply write to the task register once and the whole memory map changes.
Best
Ted