Hello All,
I tired out the method I posted, keeping the INITn pin low from power-up, but it did not work. The Lattice Diamond Programmer was still detecting the on-board FPGA (Mach XO2 7000HE) upon scanning. The FPGA even loaded the configuration from flash memory and started executing which should not happen according to the datasheet (Figure 1. Configuration Flow in the MachXO2 Programming and Configuration Usage Guide). According to the datasheet, if the INITn pin is kept low, the FPGA should not come out of the initialization process. I wonder what is happening.
Next I tried my luck by controlling the JTAG port using the JTAGENB pin. It worked! I programmed the on-board FPGA with these settings: JTAG_PORT: DISABLE and MUX_CONFIGURATION_PORTS:ENABLE (settings available in Spreadsheet View->Global Preferences). Once I configured the on-board FPGA with these settings, keeping the JTAGENB pin (pin 120) low made the JTAG pins general purpose I/O. Now when I did the JTAG scan, the on-board FPGA was not detected. But when I pulled JTAGENB pin high and initiated a JTAG scan, the on-board FPGA was detected. With the JTAGENB pin low, I connected my custom board to the breakout board through the JTAG header and I initiated the JTAG scan and guess what, the FPGA on my board was detected! So the idea is to disable the JTAG port of the FPGA in the breakout board by pulling the JTAGENB pin low.
You do not need any hardware modification on the breakout board with this method.