Going to learn FPGA, seeking advice about choosing dev. board etc.

[iMo]

The OP has decided for an Artix-7 board - that is a good decision, even not the cheapest one (when starting with FPGA/verilog).
A good starting exercise would be to play with a ready-to-run solution, like PDP-11 which fits into 7-35, and the complete project is available, afaik. Or something similar. You will learn a lot.
I did in past with Spartan6 ($30 board+$20 jtag programmer) and Microblaze and PDP-8.
The messing with Microblaze was much harder, btw, as there is a lot of info spread over the web you need to understand in order to succeed (C SDK in ISE14.7).
Hopefully Vivado does it better

[rstofer]

All of the new Digilent boards have built-in programmers and present as a USB port.  I don't know how they work and I don't care.  I just use Digilent's Adept software and the deed is done.  In most cases, the Digilent USB solution works with the Xilnix Vivado ILA (Internal Logic Analyzer).

That Artix 7 board has a built-in programmer so no issues.

First the OP needs to get an LED to blink.  Then he can look around for projects.  First the LED, next a CPU (LC3 comes to mind).

It will be a while before converting the state diagrams in the LC3 project to logic states in a Finite State Machine will begin to make sense.  It just takes time.

So much to learn and so little time...

[asmi]

I use Digilent JTAG-HS3 Programming Cable to program Xilinx FPGAs on my custom boards. Works just fine, including JTAG-to-COM port and HW debugger via VIO/ILA.

[Sal Ammoniac]

So while using Quartus I've noticed that it's painfully slow

Welcome to the world of FPGAs. All of the development tools (Quartus, ISE, Vivado, etc.) are slow compared to microcontroller development tools. Just get used to it.

[rstofer]

And buy the baddest PC you can afford and make sure to select 8 threads in Vivado.  I built up an I7-7700K based machine with 32 GB of very fast RAM specifically to run Vivado.  ISE was always pretty grim but Vivado completely redefined the term.  Trust me, that old Pentium 4 just won't cut it!

An 8 core Xeon would be nice.  Out of my hobby price range, but nice.  If I did this stuff for money, I would be upgrading to the fastest 8 cores on the market.  And the process would still be pretty grim.

If you have a cooling system that modulates the fans according to compute load, expect them to be pegged during the build cycle.

[SiliconWizard]

I use Digilent JTAG-HS3 Programming Cable to program Xilinx FPGAs on my custom boards. Works just fine, including JTAG-to-COM port and HW debugger via VIO/ILA.

I've used Digilent HS2 for this a lot, and Digilent Adept, but I've now switched to a custom JTAG programmer (FTDI-based) and OpenOCD. I can not only program the internal configuration temporarily but also program an external SPI Flash using this: https://github.com/quartiq/bscan_spi_bitstreams (nice project!)

[asmi]

I've used Digilent HS2 for this a lot, and Digilent Adept, but I've now switched to a custom JTAG programmer (FTDI-based) and OpenOCD. I can not only program the internal configuration temporarily but also program an external SPI Flash using this: https://github.com/quartiq/bscan_spi_bitstreams (nice project!)

I program FPGA's boot QSPI using indirect method from inside Vivado. I also have FTDI's MPSSE cable that I used to use for programming stand-alone SPI flash, but now I mostly use 1.8 V QSPI Flash for FPGA bitstreams while the cable can only do 3.3 V. HS3 cable can program 1.8 V flash via indirect method just fine because it has Vref pin which determines the voltage level to use. Most peripheral devices I use support 1.8 V logic level, which saves power and improves signal integrity compared to 3.3 V. On my latest FPGA board I use 3.3 V mostly for LEDs as 1.8 V is not enough to light them up. The odd one here is HDMI, which uses 3.3 V signalling.

[SiliconWizard]

I see. My JTAG adapter is not just a plain FTDI MPSSE cable, it has a comfy 0.9V-4.5V voltage range through level shifters.

[rstofer]

On several occasions, I have mentioned that the Digilent Nexys4-DDR board (since renamed) is my favorite board.  I trashed my main desktop yesterday so I had to recover a lot of stuff including Win 10 and Vivado.  It had been a while since I worked with the board and I had forgotten how easy it was to program.  Vivado knows how to program it and all I need to do is connect the USB cable.  The very same cable that provides power for the board and a serial port for the project.  This board is seriously easy to use - even if it is fairly expensive.

It is now known as the Nexys A7:

https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/

Just plug the board into the PC and everything happens by magic.  I like magic!  And I like a lot of gadgets on the board.  7 segment displays, LEDs, buttons, switches, lots of interface ports and so on.

[technix]

So far I find the Myir Z-turn 7020 board a good value option for a FPGA starter board. It is, first off, a Zynq, so you get a lot of built-in hard IP cores, up to and include a full blown dual core ARM CPU complex. It is also on the smaller end for the physical size for the boards being just slightly larger than a Raspberry Pi and about the same size as Cubieboard. It is also a cost effective option having about the same resources as DE1-SoC but costs half as much.

[technix]

And buy the baddest PC you can afford and make sure to select 8 threads in Vivado.  I built up an I7-7700K based machine with 32 GB of very fast RAM specifically to run Vivado.  ISE was always pretty grim but Vivado completely redefined the term.  Trust me, that old Pentium 4 just won't cut it!

An 8 core Xeon would be nice.  Out of my hobby price range, but nice.  If I did this stuff for money, I would be upgrading to the fastest 8 cores on the market.  And the process would still be pretty grim.

If you have a cooling system that modulates the fans according to compute load, expect them to be pegged during the build cycle.

Can Vivado use more cores than 8? I have a dual octa-core workstation with 16 physical cores and 32 threads across two physical chips. (I have 128GB of DDR3-1600 SDRAM on octa-channel mode and PCIe 3.0 x4 NVMe SSD to keep them fed, as it is already optimized for parallelized software compiles.)

[rstofer]

The WebPack (free) version will only use 8 threads.  I have no idea what the full version will do.