No, all the soldering "failures" I've had were because of too low temperature/inadequate reflow and were fixed by a second reflow. This has nothing to do with the chips. You just can NOT know if your BGA soldering was actually sufficient and when you do encounter bugs you have to do many copies to rule out soldering issues. This also doesn't address the lack of debugging access to pins, which makes it impossible to test fixes and requires a board respin for every change. It's impractical to have test points on every possible connection, which wouldn't be necessary on a QFP because you can attach bodge wires to the pins.
A customer of mine uses the curve tracer to check the functionality of the pin protection diodes.
That makes definitely sure that the soldering for the pin was a success.
OK, someone will now state the case of multiple parallel pins.
I'm playing with the idea of marrying a FPGA with GTX transceivers to a Beaglebone Black or AI.
That would separate the potential Linux problems/support and DDRn from my soldering art and
would let me concentrate on these fast JESD-204B ADCs, DACs and SDR.
I'm still stuck at the point wether I can get peripherals in the FPGA memory mapped
to a window in the ARM address space.
There must be a 16 bit multiplexed bus possible at least, but I have never seen it used.
The FPGA configuration could be bit banged by the BBB directly from a .bit file, no need for a dongle.
Cheers, Gerhard