Cyclone IV PLL not working correctly

[rokspy]

I'm using Quartus PLL IP on the Cyclone IV EP4CE22E22C6, but the frequency is incorrect. I supplied the PLL with 50MHz from a crystal and configured the PLL to output 100MHz. It did work some time ago, but today when I started testing things, the data rate was much slower than required, but the data is still correct, so I believe that the logic element part of the FPGA okay. The crystal also supplies stable 50MHz. The PLL output frequency is around 66kHz... At, the moment I'm directly connecting the PLL output to an open pin and nothing else.
What could be the cause of this behavior? Dead PLL??
Thanks for the answers in advance!

[rokspy]

Sorry for wasting space and time here... There was an issue with the pin planner. The name of the signal in the pin planner was slightly changed at some point in time and I did not notice that. The PLL was supplied by some random input that was not connected to any port.