Electronics > FPGA

DDR3 Refresh and Micron DDR3 model

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ddr_controller:
I am trying to implement a DDR3 controller for Arty A7 and have found many useful threads in this forum, however, one question I have not been able to solve is refresh timings.

I initialized the DDR and performed a Write and close the row without errors, then I ran the simulation for at least 10ms but the model does not show any error regarding not refreshing during this time. From the docs. I read that on average refresh commands should be sent every 7.8us (page 121).

Do I have to activate the error message with some sort of #define or it just doesn't check for refresh violations?

BrianHG:
That's the maximum average.  This is the slowest if you wish to evenly space your refreshes.
You only need to refresh the entire chip every 64ms if the chip is set to maximum 85deg C.
Check out the max tRFC in the datasheet.  It is actually 70.2ms.

Run your sim for 70.2ms without any refresh commands, and it should spit out an error.

Remember, it is possible to wait 60ms without any refreshing and then burst refresh commands back-back to do the entire chip in one shot without any error.

See Micron 4gb DDR3 data sheet, page 86, table 58, 'Refresh Timing'.
Download this data sheet: Micron DDR3 datasheet
Careful, running the DDR3 at 105 deg C shortens this 64ms time to 16ms meaning you also need to shrink the average refresh period if you run the DDR3 in this mode.

(Doesn't Xilinx have a free DDR3 ram controller?)

ddr_controller:
Shouldn't it be 70.2us? In table 58 t_RFC MAX = 70,200ns

BrianHG:
Read the next page, and I did say the max was 70.2 at the top of my post...
I shrunk the time down to 60ms to give you time to do all 8192 back to back refresh commands before the 64ms time runs out.
Actually, with the larger DDR3 chips having a slower refresh, cut my 60ms down to <50ms.

ddr_controller:
I think I replied before your edit  :palm:

About Xilinx free controller: I am trying to learn how a DRAM controller works so I want to build one...

Anyway, I think I just don't understand when and how refreshed are done. I got lost in the documentation, can you point me to the key pages on the docs. where I can find a complete description of how to refresh?

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