Does an SPI to AXI Lite interface exist?

[Boscoe]

Hi all,

I'm capable of writing such a thing but I'd like to stick to proven IP.

I have some DMA IP inside an FPGA that requires configuring over AXI4-Lite. The FPGA does not have a hard processor and I'd rather not add a soft core which adds complexity to the FPGA design and adds another software project.

I have a big/fast external MCU that I'd like to be able to access the internal FPGA AXI4-Lite bus for low throughput configuration steps without using all of the pins on the FPGA! Does anyone know of such a core? I have looked through Xilinx's catalog and through open cores but come to nothing.

Thanks
Boscoe

[langwadt]

close enough?  https://github.com/ultraembedded/core_dbg_bridge

[Boscoe]

Looks great, thank you!