Yes, those old true CPLDs have internal memory. Not only that, the memory is distributed across the chip, so there is no loading, the device is almost immediately ready from the power up.
They don't mention the size because you don't need to worry about it, it is just enough to configure all the configurable things. There is no user memory or multiple alternative images or anything like that.
The new devices sometimes are called CPLDs, but really they are FPGAs.
Thanks for your time to reply.
I have three questions if you please.
As I understand the new CPLDs is like FPGAs from the side of the processing power but they don't need an external memory for the cofiguration code. Also, in the memory of a CPLD you can't store data like on a microcontroller and If you want then you have to use a microcontroller combined with a CPLD or there is another way?
Second, what do you mean with "multiple alternative images"?
Third, because I have a similar PCB can I read the "cofiguration code" (I don't now if this expresion is right or what is called the program of an FPGA formally... please correct me) from a working CPLD and program a new one (like on the microcontrollers can be done)?
I apologise, but my knowledge about CPLDs & FPGAs are almost zero.