Electronics > FPGA
Efinix Trion T20 MIPI Tx LS question
Wiljan:
I bought a Efinix Trion T20 Dev kit to play a bit whit the MIPI interfaces
The dev kit does support 2 x MIPI Tx and Rx, adaptor boards is supplied to interface with RPI 15pin cables
https://www.efinixinc.com/products-devkits-triont20-mipi.html
There are some domo applications which receive RPI camera data and other which does send the data out so you can send the MIPI to the RPI and see it on the HDMI out (looping thought the T20 FPGA) it all works fine.
So I tried to hook a RPI 7" DSI Screen 800x480 to the MIPI tx and have a Test generator creating some video data to the 7" RPI screen as a DSI HS signal. looking on the DSI Lane data / clock I have clock and data which does look like a test signal, so far this looks fine.
To turn on the 7" screen I have to send a few I2C settings for power and contrast to the Screen and that part also works fine as expected.
But I also need to set registers over the MIPI as LS data and I did log the data on the RPI <=> Screen and know exactly what to send and this does fit the source code for the screen for RPI on GitHub
So to send a LS signal you need to put the MIPI CSI-2 in LS mode by sending an ESC code and then you need to send the "payload" data for the registers in the Screen. and later exit the LS mode back to HS mode
I can set the T20 in the ESC mode and get the ESC "11100001" but then I'm unsure how to send the init data
What I do change from HS mode to LS mode is to set the ULPS_ENTER[0] high for a short time = then I can see the ESC send on a scope. I would the assume the the "payload" data should be present on the DATA[63:0] and take 4 bytes at time.
But nothin are send after the ESC so I hope someone here have an idea.
On the bigger Titanium FPGA there is an AXE4lite interface on the MIPI interface
I can't really find anything in the samples or in the pdf's from Efinix but since the ESC can be send I would expect it to be possible
https://www.efinixinc.com/docs/trion20-ds-v5.2.pdf
https://www.efinixinc.com/support/docs.php
Wiljan:
I might have found the answer, not what I was hoping for
The Trion does seems to miss what the Titanium have LP_OE / HS_OE and and then send data as bit bang on LP_OUT
I guess I need to test on a Ti60
https://www.efinixinc.com/docs/titanium60-ds-v2.7.pdf
mon2:
Which MIPI core are you testing?
The following MIPI DSI TX core claims to be compatible with all Efinix Titanium devices:
https://www.efinixinc.com/docs/mipi-dsi-tx-core-ug-v2.0.pdf
My bad...you are on the Trion series. Personally tested the Ti60 titanium kit only.
Suggest to ask in their user forum. Also review the GitHub articles that show how to mate DSi screen (ipod nano) to the low density Lattice FPGA by Mike / Gaurav, etc.
Aside from muxing the output lines with external resistors for the proper logic levels, appears to be a state machine.
Q: How will you handle the graphics creation for this project?
We are somewhat on the fence on the solution to use a FPGA or a dedicated micro with a GPU and supporting tool chain like embedded wizard or LVGL. Now there is the STM32U5 with MIPI DSi support with their touchgfx.
mon2:
FYI - this is when we raised this question 2021 so the IP may have been updated since then:
https://www.efinixinc.com/support/forum.php?cid=11&pid=104
Wiljan:
Yes I'm on the Trion, correct
But I also bought the Ti60 dev kit with the Apple display, but I have not had time to test that board yet
https://www.efinixinc.com/products-devkits-titaniumti60f225.html
What I'm looking into to make is a setup where: I have a MIPI camera sending signal to the FPGA at the same time I receive a HDMI signal from a PC and then I need to Key the PC signal over the MIPI and then output it to a DSI screen.
So basic a HDMI overlay on MIPI.
I did some test on the Trion with 2x MIPI IMX219 where I do send 2 x parallel I2C init and then the there are in sync
They do drift a little bit but if I use the same osc. for both cams I expect it to be good enough to only have a few line os buffer and then be able to process in parallel for different calculation on the fly.
The above test tells me that I can sync a IMX219 camera and probably other cameras as well.
So the next thing I want to do is to recieve a HDMI from a PC by a HDMI to CSI bridge
and i bought a few of those https://www.amazon.co.uk/Geekworm-Raspberry-Adapter-C790-1080p60fps/dp/B0B76XB1JZ
I then expect that I can get the sync from the HDMI and sync the came and overlay HDMI if the pixel value are not 0
For output I could go back from CSI/DSI to HDMI but basically I what to drive a display directly as DSI, that what I found my RPI display and did logging on the RPI ... it looks like those reg should be sen in the display over DSI (after I2C power on)
--- Code: ---87 11100001 Esc
29 06 00 23 10 02 03 00 00 00 85 79 OK DSI_LANEENABLE Clock + D0 (1 Lane and clk) /* DSI Protocol Layer Registers */
29 06 00 23 64 01 05 00 00 00 7E FA OK PPI_D0S_CLRSIPOCOUNT = 5 /* DSI PPI Layer Registers */
29 06 00 23 68 01 05 00 00 00 8A CB OK PPI_D1S_CLRSIPOCOUNT = 5 /* DSI PPI Layer Registers */
29 06 00 23 44 01 00 00 00 00 49 11 OK PPI_D0S_ATMR = 0 /* DSI PPI Layer Registers */
29 06 00 23 48 01 00 00 00 00 BD 20 OK PPI_D1S_ATMR = 0 /* DSI PPI Layer Registers */
29 06 00 23 14 01 03 00 00 00 E5 74 OK PPI_LPTXTIMECNT = 3 /* DSI PPI Layer Registers */
29 06 00 23 50 04 00 00 00 00 01 65 OK SPICMR = 0 /* SPI Master Registers */
29 06 00 23 24 04 02 00 2C 00 49 03 OK HSR = 0x02 / 0x2C /* LCDC/DPI Host Registers */
29 06 00 23 2C 04 02 00 15 00 AB 43 OK VSR = 0x02 / 0x15 /* LCDC/DPI Host Registers */
29 06 00 23 28 04 20 03 3D 00 B5 E7 OK HDISPR = 0x0320 / 0x003D /* LCDC/DPI Host Registers */ 800
29 06 00 23 30 04 E0 01 07 00 EE 41 OK VDISPR = 0x01E0 / 0x0007 /* LCDC/DPI Host Registers */ 480
29 06 00 23 20 04 52 01 10 00 2D 83 OK LCDCTRL = 0x0152 / 0x0010 /* LCDC/DPI Host Registers */
29 06 00 23 64 04 0F 04 00 00 E5 63 OK SYSCTRL = 0x040F /* System Controller Registers */
100mS later
87 11100001 Esc
29 06 00 23 04 01 01 00 00 00 23 0F OK PPI_STARTPPI = 0x01 /* DSI PPI Layer Registers */
29 06 00 23 04 02 01 00 00 00 EF 12 OK DSI_STARTDSI = 0x01 /* DSI PPI Layer Registers */
--- End code ---
I made a FSM to sequence the start up and some loop testing and as you can in the attached "Trion_ESC.png" the ESC are send very nice on the Trion with the right levels .... just no way to add some extra payload data
I will start looking into the Ti60 and see what is possible in the IP, but it a shame it not possible on the Trion
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