Electronics > FPGA

Enpirion/altera switching regulator problems

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motocoder:
Anyone here have any experience with Enpirion (now Altera) switch mode regulators? We are using a number of them to generate the power supply rails for a board with an FPGA and DRAM on it. One of them an ER2120QI used to generate the 2.5v rail, is occasionally not coming up.

When it fails, it will either not come up at all, or come up well below the target voltage, or do other weird things like generate a sawtooth waveform on the PG (Power Good) pin!

I have no experience with these parts (wasn't my choice to use them), so am hoping someone here can shed some light or offer some theories.

Thanks

PeteH:
I've used the embedded inductor variants of this part.

 Your exact usage would be needed to diagnose this. What inductor are you using? What is the expected 2.5v current/inrush? What is the total capacitance on this rail?

Add all DDR2 termination currents?

Are you capacitively loading the PG pin? Open drain outputs shouldn't have a triangle wave.... Unless of course, AVINO is in OC or slewing down. Do you have the right decoupling on AVINO and the filter to AVIN?

motocoder:

--- Quote from: PeteH on August 17, 2014, 11:25:07 am ---I've used the embedded inductor variants of this part.

 Your exact usage would be needed to diagnose this. What inductor are you using? What is the expected 2.5v current/inrush? What is the total capacitance on this rail?

Add all DDR2 termination currents?

Are you capacitively loading the PG pin? Open drain outputs shouldn't have a triangle wave.... Unless of course, AVINO is in OC or slewing down. Do you have the right decoupling on AVINO and the filter to AVIN?

--- End quote ---

Hi PeteH -


* The inductor is 3.3 uH, part number PCMC063T-3R3MN
* This rail is expected to source about 1.7A.
* Total capacitance on this rail is approximately 40uF (4 x 10uF in parallel).
* This rail is not related to DDR. It is one of the power rails for the FPGA.
* We are not capacitively loading the PG pin. Note that most of the time, this circuit is working,and PG is putting out a nice output that goes high with the expected rise time. It's only when it goes into this failed state on start-up, and even then it's rare that PG is emitting this strange sawtooth wave.
* AVINO has a 4.7uF cap to ground
* AVINO is connected through a 10 ohm resistor to AVIN. The AVIN net also has a 1uF cap to ground, is connected to the M/S pin, and is pulling up (via a 10K resistor) the PG output.
I should also add that these component values were reviewed / suggested by an engineer at Enpirion.

motocoder:
Oh, I also want to add that this is the EVT version of the board, and it's very possible there is some problem there, for example something leading to an over-current condition on this rail. I'm just hoping someone with experience with this part can point to some likely root cause for me to follow up on investigation.

I went back and looked at some oscilloscope captures that the board assembler sent. They did measure the current out of this thing. Based on the waveform I think they tapped into the circuit on the inductor (which goes from the SW output of the chip to the filter caps on the output). In a normal start-up cycle, peak current is 540mA, but during the failed startup cycle - the one with the funky sawtooth waveform on PG- there is a very brief spike of current to 2.78A, with corresponding output voltage of 560mV, before the output voltage and current drop back to zero.

David Hess:
From your description, I would suspect current limiting or fold-back current limiting is causing the problem.  The later can lead to the regulator "latching" on or off.

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