Author Topic: 10 level logic in VHDL (for simulation only)  (Read 1066 times)

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Offline SSLTopic starter

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10 level logic in VHDL (for simulation only)
« on: October 03, 2019, 10:11:01 pm »
Hi,

I'm taking a class in numerical numerical methods and we have an assignment on floating-point arithmetic.

I thought it might be fun to implement this in VHDL.

But the assignment require us to use FP numbers with base10 instead for of base2 |O

Is there any way to implement logic in VHDL with 10 logic levels instead the normal 2?

I don't care if it will never synthesize, but for simulation I can't see any reasons for it not being possible? I just can't find any types or methods that will support 10 level logic - is it possible? If, how?





 

Offline Bassman59

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Re: 10 level logic in VHDL (for simulation only)
« Reply #1 on: October 03, 2019, 11:11:52 pm »
Hi,

I'm taking a class in numerical numerical methods and we have an assignment on floating-point arithmetic.

I thought it might be fun to implement this in VHDL.

But the assignment require us to use FP numbers with base10 instead for of base2 |O

Is there any way to implement logic in VHDL with 10 logic levels instead the normal 2?

I don't care if it will never synthesize, but for simulation I can't see any reasons for it not being possible? I just can't find any types or methods that will support 10 level logic - is it possible? If, how?

VHDL has long supported the real type. It's generally not synthesizable but for simulation purposes it's used all the time.
 

Offline SiliconWizard

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Re: 10 level logic in VHDL (for simulation only)
« Reply #2 on: October 03, 2019, 11:50:24 pm »
Well, I guess the OP still wants to implement FP arithmetic "from scratch", and not use a FP type? (Otherwise I wouldn't see the point of this assignment? ::) )

The OP's not completely full clear, but from what I understand, they want to implement FP in base 10? I don't really see the problem. Doing this even with very low-level logic. The OP may not have heard of BCD.

In very short: encode each digit with 4 bits (only using the 0-9 values obviously). The rest is up to you.
 

Offline SSLTopic starter

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Re: 10 level logic in VHDL (for simulation only)
« Reply #3 on: October 04, 2019, 12:17:59 am »
Well, I guess the OP still wants to implement FP arithmetic "from scratch", and not use a FP type? (Otherwise I wouldn't see the point of this assignment? ::) )

Correct. It must be implemented from scratch so a FP type is not an option.

The OP's not completely full clear, but from what I understand, they want to implement FP in base 10? I don't really see the problem. Doing this even with very low-level logic. The OP may not have heard of BCD.

In very short: encode each digit with 4 bits (only using the 0-9 values obviously). The rest is up to you.

I think you understood the assignment correctly.

I have heard of BCD and used it previously. But only to print my internal binary values in a more human friendly form on a 7-segment or some other type of display.

Using BCD to work with base10 numbers in base2 in this context haven't crossed my mind.

Thank you very much!

 


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