Author Topic: FPGA Damaged  (Read 1281 times)

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Offline derekTopic starter

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FPGA Damaged
« on: August 22, 2021, 07:29:22 pm »
HI,

I need some advice, I was programming a Lattice LPX2-8E-5TQFP144, with an updated FPGA code.

But I got the programming pins on the JEDEC interface the wrong way around, the correct pin connection should be:

Pin   Function
1.      Vcc
2.      TDO
3.       TDI
4.       TMS
5.       GND
6.       TCK

Accidently, I connected the JEDEC interface as:

Pin   Function
1.      TCK
2.      GND
3.      TMS
4.       TDI
5.        TDO
6.        Vcc

The programming failed.

After seeing my stupid mistake, I reversed the connector, but Chip ID could not be found.

Is the LPX2 damaged and requies replacing?
Regards,
Derek
 

Offline ataradov

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Re: FPGA Damaged
« Reply #1 on: August 22, 2021, 09:06:13 pm »
I doubt that this reversal would damage the device. If anything, applying VCC to the TCK may have damaged the programmer.

Although  TDO would be shorted to GND and driven by the FPGA. This is not ideal, but again, I doubt it would cause any damage.

I would look with with the scope and check how signals look like.

A simple test for JTAG is to clock 32 cycles on the TCK while TMS is low, and you should see some data on the TDO pin. This would be a Chip ID.

Also, the device may have JTAG permanently disabled. In this case, there is nothing you can do.
« Last Edit: August 22, 2021, 09:12:42 pm by ataradov »
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