Author Topic: FPGA for DRAM based memory expansion  (Read 365 times)

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Offline Vivis

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FPGA for DRAM based memory expansion
« on: June 18, 2021, 08:23:12 pm »
Total novice when it comes to FPGA's, but i've got a design idea and think it would be possible. I happen to have some FPGA's on the way for another project (in circuit emulator) so now is a great time to try it out.

I have a device from the late 80's that takes a proprietary ram expansion. I have the original expansion that is 512kb but they are capable of being larger. The company that made this device had an expansion board that was 1.5mb and 3rd party companies made even larger ones.

The expansion board is relatively simple looking with 2 74 series chips and 13 256kx1 dram chips (plus a few caps and resistors). Taking a look at the schematics for the original device, the expansion looks pretty close to the layout of the built in memory. Looks like the only difference is it uses CAS1 instead of CAS signal for column strobe.

I was wondering if this would be worth pursuing using an FPGA. I cannot copy the original design easily due to the package the dram chips are in (dual pin but all on one side. Kind of a standing dip.) as the new replacements are standard dips and would take up far too much space. I'd like the design to be a bit more modern regardless. I know they made 3.5mb expanders for this device, and I'd rather not try to figure out how they crammed so many of those not so common chips in there.

The FPGA I'd be using is Xilinx spartan 6 design; XC6SLX9 to be exact. From what I can tell, this will not have the capacity I'd want, but at the moment that's not too important. I can find a better suited board in that respect later. These particular XC6SLX9 boards also have a completely unnecessary UART on them too, so I'm sure in the future I'll be using a different FPGA. I just want to get a few kb to show up and be usable as more memory. This would be a proof of concept project.

If anyone can chime in and let me know if this is a fools errand that would be great. If it is a decent use of FPGAery then a point in the right direction for emulating DRAM would be awesome. I'm not an old hand at this, but I'm a technologist by trade so as long as I RTFM then I can usually wrap my head around what I need to.

If on the other hand this is something that's just better to do in hardware, a nudge in the right direction would be appreciated as well.

I believe I've got the requisite tools for doing the debug (DMM, scope, 43 channel logic analyzer) too.

I'll attach some parts of the original device schematics regarding memory and processor below. Let me know if more info is needed.

Thanks for any help. I'm very excited to get into the FPGA world if possible!



« Last Edit: June 18, 2021, 08:57:42 pm by Vivis »
 

Offline agehall

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Re: FPGA for DRAM based memory expansion
« Reply #1 on: June 18, 2021, 09:08:57 pm »
I think a full FPGA would be overkill for this. I’d go with a CPLD (which is kind of a super simple FPGA) for glue logic and then use some standard RAM chips that you can get hold of easily.

The CPLD is programmed much like the FPGA but will probably be easier to use as it stores the bitstream internally.

If you want an all-in-one solution though, you are probably forced to go for an FPGA as CPLDs have much less elements in them so implementing memory in them isn’t really practical.
 
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Offline evb149

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Re: FPGA for DRAM based memory expansion
« Reply #2 on: June 18, 2021, 09:48:16 pm »
If you're going to use a FPGA like the spartan series or most any other comparable or better modern one,
most of those e.g. Xilinx / Intel devices have a memory interface generator or similar tool in their development tools
which you can use to specify the parameters you want for a memory interface to external memory.
Then it will create that memory interface for you in your FPGA project and all you must do is hook the memory chips correctly
to the pins you have selected for the memory interface of the FPGA.
Typically SDRAM or DDR2 or DDR3 or SRAM could be used depending on what the FPGA device interface supports,
the memory size and type you wish to interface.
In most of those cases you could easily have a few megabytes or more of available attached RAM.

When you will already use a FPGA that's the most "straightforward" approach to making megabits or more of RAM available.

Many good development kit you can buy inexpensively have some DDRx DRAM attached to the FPGA which you could use to prototype your project.

I would use a modern RAM chip type supported by the FPGA tools / device and then just make the RAM "look" correct to the
legacy hardware interface by making adaptive logic in the FPGA for the old style bus interface to the internal
memory mapped "port" used to access the DRAM from within the FPGA (the memory interface generator makes such a memory mapped interface port for your own FPGA logic to use).
 

Offline Vivis

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Re: FPGA for DRAM based memory expansion
« Reply #3 on: June 18, 2021, 10:16:55 pm »
Great advice so far! I did note the "memory generator" when i was doing initial research. Now I know thats the direction to be heading.

The key is (as far as I can tell from the schematics) getting the new memory (of whatever type it is) looking like dram. Thanks for the CPLD suggestion too, sounds like a great alternative. I'll weigh the costs when I decide how to do a final implementation.

 From the looks of the memory map, I could potentially get quite a bit in there (600000-BFFFFF appears to be free and where the normal memory expansion would be addressed). Any more memory than 4mb would probably be a bit overkill though, and I don't know how the OS would handle it (only one way to find out).
 


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