Author Topic: FPGA IO - parallel termination resistors  (Read 979 times)

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Offline steamedhamsTopic starter

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FPGA IO - parallel termination resistors
« on: September 07, 2021, 09:01:22 pm »
I am looking at a schematic of the I/O buffers on an FPGA and they have the pull up resistor feeding into a VCC/2 instead of VCC.

After reading about parallel termination resistors.. It seems that most are connected to ground or VCC.

There is also an option to include weak termination however isnt that pointless if there is a pull up?

I am not sure why but I find IOs really hard to understand.  |O
 

Offline ataradov

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Re: FPGA IO - parallel termination resistors
« Reply #1 on: September 07, 2021, 09:33:45 pm »
What specific FPGA you are talking about? And attach the schematic you are looking at.

Termination and pull-up/pull-down resistors are different. And usually all those things are optional and what to use depends on the I/O pin type and application.

VCC/2 is often used as a reference level for high speed interfaces (DDR SDRAM and similar), so this may be the goal of this option.
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Offline Bassman59

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Re: FPGA IO - parallel termination resistors
« Reply #2 on: September 07, 2021, 10:50:01 pm »
I am looking at a schematic of the I/O buffers on an FPGA and they have the pull up resistor feeding into a VCC/2 instead of VCC.

After reading about parallel termination resistors.. It seems that most are connected to ground or VCC.

There is a laundry list of signaling standards. Many were designed to handle multiple loads across a backplane. Their "weird" termination requirements such as being pulled to some intermediate voltage are intended to ensure good signal integrity. Your FPGA's user manual should have a list of all of the I/O standards it supports and all of their termination requirements.

That said: for most cases you'll use LVCMOS for single-ended I/O and LVDS for differential, so you don't need to worry about these other termination requirements.

Quote
There is also an option to include weak termination however isnt that pointless if there is a pull up?

A "weak termination" isn't really a termination. It's a pull-up or pull-down. It's meant to ensure that an input is always at some valid logic level when the driver is tristated or is not connected. The reason it's called "weak" is that it's a high enough resistance value to be easily overdriven.

But because it's "weak" it's slow. That is, if you disabled the driver, the input would eventually see the pull-up voltage level. This is why, for example, I2C specifies a specific value of pull-up resistor. The 2.2k ohms to 3.3 V goes to that rail much faster than a weak pull-up of some 50k ohms.
 
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