Xilinx FPGA: How to define "dummy" inputs in UCF file?

[ebastler]

I am currently tinkering with an FPGA-based project (using a Spartan 6). I use a modified board from an older project as my test bed for the moment, while getting the VDHL to work and confirming what I/O and user interface controls I want on the final PCB.

The prototype board is lacking some features I will put onto the final PCB, including a few switches used for option selection. I can do without them for now, but need to feed the VHDL logic a defined pattern of 1's and 0's to enable the standard configuration I currently develop and test for.

Obviously I could modify the VHDL to replace the external inputs with constants. But I would prefer to do this in the UCF file -- I might forget about the workaround in the VHDL, while the UCF will need to be modified for the final board in any case. I had hoped to find an option in the UCF syntax to define an input pin as "constant logic high" or "constant logic low", but have come up empty.

Does such an option exist? If it doesn't, how would you handle a board variant with "missing inputs" in the cleanest way?

Thanks!
Juergen

[Someone]

If its mapped to a physical pin you can set a pull-up or pull-down. Or add a top level wrapper for your development that has all the test harnesses in place and maps through to the physical pine.

[ebastler]

If its mapped to a physical pin you can set a pull-up or pull-down. Or add a top level wrapper for your development that has all the test harnesses in place and maps through to the physical pine.

Ah, right -- I do have unused physical FPGA pins on the old board, of course, and can map to these. Could have figured that one out myself, but I was too fixated on the "I want to define this as just a logic constant" approach... Thank you very much for helping me over that hurdle!