Gigabit Ethernet Example code

[ali_asadzadeh]

Hi,
I'm kinda newbie into the FPGA world, I have done some basic stuff like USART, SPI etc..Now I want to use a Gigabit Ethernet core on spartan 6. I have found this one in opencores.org
https://opencores.org/projects/ethernet_tri_mode

I want to know if there is any example for this one or any other open core one, what PHY should I use (or I just can use any GMII PHY I can find)? any Example or path to learn this thing would be highly appreciated.

[hamster_nz]

I wrote this for the PHY on the Digilent Nexys Video:

https://github.com/hamsternz/FPGA_GigabitTx

[ali_asadzadeh]

Thanks for sharing! Does it use the https://opencores.org/projects/ethernet_tri_mode core?

[hamster_nz]

Thanks for sharing! Does it use the https://opencores.org/projects/ethernet_tri_mode core?

No

[laugensalm]

I'd throw in that one:

https://github.com/yol/ethernet_mac/

It's VHDL though. But generic enough to run on Xilinx/Lattice, etc.

There are also some more exotic implementations using Forth driven stack machines, like this one:
https://excamera.com/files/j1.pdf. Some inspiration you might also get from the Lattice EVDK reference Gbit streaming reference design.

If you're used to standard uC DMA approaches, you can get a pretty good performance with the above core plus a DMA auto buffer packet FIFO, as described here: https://section5.ch/index.php/2017/05/10/dma-autobuffering-techniques/.
With the GMII interface you're on the safe side with plenty of matching PHYs, only RGMII was found to be a bit tricky with regard to DDR capable I/O. So if you're routing your own board, you might want to cross check with existing refdesigns.

[ali_asadzadeh]

Thanks for sharing, I want to test and see some UPD or TCP packet sending and receiving too.