Hi. We have been reviewing something similar for some pending industrial designs so can share what little we do know. A steep learning curve for us as we are also new to FPGA deployment and Verilog. Making good progress with state machine use and loving the flexibility available to us with FPGA technology.
MIPI Display = MIPI DSI.
There are some gurus of this field on this forum - linking their pages:
MIPI is an industry spec and documented with some membership only docs but most of the required information is now public
http://www.electricstuff.co.uk/nanohack.html* a must read / view - reverse engineering of the ipod nano MIPI (single lane) display with Lattice FPGA (can be ported to other targets)
* Mike is on this forum and this research has opened doors for this field
Guarav's website is an excellent one and also must read:
https://www.circuitvalley.com/2020/01/spi-mipi-bridge-fpga-verilog-hdl-ipod-nano-nano-lcd-iphone-mipi-lcd.html* he on this forum and recently posted his latest camera project
https://mightydevices.com/index.php/2018/02/mipi-dsi-tx-interface-for-ipod-nano-7th-gen/* inspired by the above, this DSI target is the ipod nano 7th gen display
Efinix offers a DSI kit which uses the iPhone 7 DSI display (4 lane) using their Ti60 kit
* offers an excellent start with their demo code to drive MIPI displays
Our recommendation is to skip the HDMI to MIPI bridge idea and instead, just consider FPGA to MIPI DSI. Gowin / Efinix can support 1-4 lane MIPI displays.
https://www.efinixinc.com/products-devkits-titaniumti60f225.htmlThe Efinix kit was a bit rough when first introduced to the market but since then has been refined with the sample code and documentation. They are now in sync (not the boy band) and the demo works fine. We are considering to review their latest kit which allows for 4 of video streams to be captured and displayed onto HDMI output. Just a FYI.
You can study the commands used by Efinix / above articles to compare on how to initialize your target custom MIPI DSI display. The display vendor will offer the MIPI commands for initialization. The rest will be about using the FPGA to buffer a frame of data and stream out to the target as required and loop.
If you plan to do any video manipulation such as alpha blending, etc. - not 100% sure if they are available from these vendors but likely something is available in public github projects.
Hope this helps.