GOWIN FPGAs

[SiliconWizard]

I'd be curious/interested in evaluating GOWIN FPGAs. Does anyone know if there are eval boards available, and if so how and how much?
Thanks

[thm_w]

https://www.eevblog.com/forum/fpga/gowin-fpga/

https://shop.trenz-electronic.de/en/Products/GOWIN-Semiconductor/
https://shop.trenz-electronic.de/en/Products/Programmable-Logic/Gowin-LittleBee/

[SiliconWizard]

Thanks, didn't know trenz electronic had them.

[hamster_nz]

Sipeed just mentioned me in a tweet:

"We are designing super cheap FPGA board with Gowin. It is DIP40 shape, with 40P RGB LCD connector, and on board JTAG Debugger! Total about $3~"

Interestingly enough, ico_TC replied:

"Send us 10 boards and we might write an open source toolchain for it.  Because for most user, waiting for a license file to run the design software is a PITA."

Sipeed were game! It looks as though it might be on for a FOSS toolchain for GOWIN!

https://twitter.com/SipeedIO/status/1164912710418481152

[SiliconWizard]

That's cool.

"we might write an open source toolchain for it" sounds a bit optimistic though, but hey, good luck!

[colorado.rob]

That's cool.

"we might write an open source toolchain for it" sounds a bit optimistic though, but hey, good luck!

Optimistic? I don't think so... http://icoboard.org/icotc.html

https://github.com/YosysHQ/yosys/tree/master/techlibs/gowin

[gnuarm]

The Gowin parts are not much like the iCE40 parts really.  They are much more like the Orca derived Lattice parts like the XP, XP2, etc. 

People accuse Gowin of "ripping off" Lattice, but aren't most FPGAs about the same?  The bottom line is they appear to be making some very useful devices and are using packages the two largest FPGA makers ignore.  Having access to QFN and QFP packages is very useful and very rare in FPGAs.  In fact, on a recent project I was going to use a Lattice part, but once the design outgrew a 48 pin QFN package, there were no useful alternatives in the Lattice line.

So I welcome the new player Gowin.  I am currently working on a design using their DSP module and am finding the data sheets to be a bit in adequate.  Seems I'll have to "reverse engineer" the damn things myself.  My next step is to get the simulation working with their instantiated module generated by the tool.  Once I have that I will be able to see for myself how it works.

[gnuarm]

BTW, the Trenz board has a 9K part in the QN88 package with the same debugging chip as on the Gowin boards (just different package).  The Sipeed board uses a 1k part which is missing some features like DSP units and the Shadow RAM (LUTs used as RAM) and they use a Chinese work alike debug chip. 

In quantity the -9 is only a buck or so more expensive than the -1 parts.  I get that Sipeed is all about low prices, but this is a case where they did themselves a disservice by going for the absolute bottom dollar.  Then they connect it to an LCD graphic display which is not going to get much love from the few gates in the 1K part.

[ali_asadzadeh]

If you find a way for simulating the IP's please let me know too,
Also I will choose GW2A-LV18EQ144C8/I7, Because it has an SDRAM, a nice package, 20K luts and you can get it around 3$ if you buy directly from them @ about 20units.

[up8051]

and you can get it around 3$ if you buy directly from them @ about 20units.

Price in distributors is ten time more:

GW2A-LV18EQ144C8/I7
Mouser price 38,51 $
Rutronik24 price 37,01 $

Is the 3$ price really achievable?

[gnuarm]

Wow!  That's a lot of chip for $3.  Where did you get that price?  I got price quotes from Rutronik and Edge, each about the same price, but at production quantities.  Edge has better pricing on their web site, but I don't know how complete it is... or accurate.  Even their web prices seem a bit high, or more accurately, inconsistent.  I don't think they update them very often... like in years?  They list the GW1N-2 parts which aren't even made yet and the GW1N-6 parts which have been dropped from their product line.

Do you mean the GW2AR-LV18LQ144C8/I7?  I think you need the R to indicate the DRAM.  Why the C8 speed?  You'll pay extra for that.

GW2A-LV18LQ144C7/I6   $5.77
GW2AR-LV18LQ144C7/I6   $9.66

[gnuarm]

I don't see any GW2ANR devices on distributors' sites, just the GW2A and GW2AR.  The GW2A is just the FPGA and the GW2AR has SDRAM in the package.  Just to be clear, this is an SDRAM die in the package along with the FPGA, so not much different than adding an SDRAM to the board.  The Trenz board has a GW1NR-9 part which includes 64 Mb pSRAM.  I didn't notice the pSRAM until now or I forgot it was in there. 

I've been digging into the DSP blocks.  They have simulation files that describe the IP as VHDL or Verilog code.  It's in the Gowin installation directory under the appropriate folder for the chip family.  I'm using the code to understand just how the DSP units work.  The docs do not make it clear at all.  For example what are ASIGN and BSIGN for?  I  thought they might be the controls to allow you to subtract vs. add.  Nope, reading the code they control sign extension.  In the MULTALU18X18 the sign extension and the accumulator enable are the only real time controls on the logic. 

C:\Gowin\Gowin_V1.9.7Beta\IDE\simlib...
gw1n or gw2a

Anyone know why the 1 family is 'n' and the 2 family is 'a'?  There's a lot of stuff like this with the naming of the families that make it hard to figure out what's what. 

[gnuarm]

Wow!  I just checked again and Trenz seems to have their boards at a cheaper price than I remembered, but the shipping to the US is twice the cost of the board!  The total is nearly $85!!!  I think I saw them at Mouser for closer to $40 delivered. 

[ali_asadzadeh]

GN2ANR-LV18QN88 is the best actually, blueskull do you have price info on them?

I got the 3$ price by contacting directly to them. The 3$ price is correct

[gnuarm]

Sorry, who exactly did you contact?  When I spoke with Gowin they referred me to their distributors.

[ali_asadzadeh]

No. But I just called their FAE and they told me in early next year (should be around CNY), we will get ANR samples. In June/July we should get their 28nm gen 5 FPGAs.

That's great news, I hope it would be around 4$, so these new babies do not need an external boot flash?
Any info on their gen 5 FPGAs? Please if you contact them ask for the IP simulation, I will ask every time I contact them, so if more ppl ask for that, they will do something about it.

Sorry, who exactly did you contact?  When I spoke with Gowin they referred me to their distributors.

Please tell them you need their Chinese distributor

[FlyingDutch]

Hello,

I made simple project "Breakout" game on small (and cheap) "Siped Tang Nano" board. Here is thread on polish robotics forum(see last post):

https://forbot.pl/forum/topic/18642-bardzo-prosta-implementacja-gry-breakout-na-zestawie-fpga-elbert-v2/

Here is link to "Sipped Tang Nano" FPGA board:

https://www.seeedstudio.com/Sipeed-Tang-Nano-FPGA-board-powered-by-GW1N-1-FPGA-p-4304.html

I also have Gowin FPGA development board GW2AR18. See that link:

https://www.gowinsemi.com/en/support/devkits/

Their "GOWIN EDA" synthessis tool is simple but quite quick.

Best Regards

[ali_asadzadeh]

I'm also curious about the price. I got $4 per pcs at 1k qty for their smallest GW1N1 from them directly. Weird.

Maybe they are trying to sell it higher after they found they have new interest in customers. I don't think the LUT make that much difference in price, since making PADS into the Die is hard, making silicon is cheap, so the higher the LUT the lower the price per 1K LUT.

[gnuarm]

Did they indicate what will be different/better about the gen 5 devices?  What processing node are the current parts?  I seem to recall reading 55 nm somewhere. 

I'm not big on process steps unless it provides something meaningful.  When you are building million LUT devices it's important to use the smallest process you can.  For <50 KLUT it's not so important. 

When planning my current design I realized they have an awful lot of pads on even their smallest devices.  As someone has mentioned, the size of the die is likely pad constrained and going to a smaller process will gain little.  But it may be a lower power process.  Lower power is always good as long as the quiescent current is lowered along with the dynamic current.  When SilliconBlue reduced their process from 65 to 40 nm the static power would have been as good or better.  Then Lattice bought them and decided it was not important raising the worst case number significantly (I assume for yield).