Gowin GW1NSR-LV4C - using CM3 with HperRAM ref design

[mon2]

Hi. Anyone manage to synthesize the factory ref design that is for the CM3 + HyperRAM ?

MCU -> Keil code compiles fine.

FPGA -> Gowin_EMPU(GW1NSR-4C)_V1.1.2\Gowin_EMPU(GW1NSR-4C)_V1.1.2\Gowin_EMPU(GW1NSR-4C)_V1.1.2\ref_design\FPGA_RefDesign\DK_START_GW1NSR4C_QN48P_V1.1\gowin_empu_hyperram

fails with 'Multiple GSR are initiated'

factory ref designs can be downloaded from here:

https://we.tl/t-qjwmIgavaq

The fault is linked to their encrypted EMPU IP. Had previously a VCO out of range error from the same project but resolved it by updating our EDA to the current 1.9.8 version that is on their website.

Why would a known good factory ref design fail to synthesize ??

Welcome any pointers. Thanks!

[FlyingDutch]

Hello,

Has you seen these blog and github repo:

https://justanotherelectronicsblog.com/?p=986
https://github.com/riktw/tang4Kramblings

Might be helpful in this subject.

Best regards