Electronics > FPGA

How much "Higher level" verilog is used in industry? (Adder example)

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Dmeads:
Okay So I consider myself a newbie in FPGAs.

today I built an 8 bit adder using full adders and one half adder.

All the parts (even the XOR gates needed) i built from the verilog primitives AND, OR, and NOT.

It was really cool to see everything work amazingly, but then I realized i could replace my 178 lines of code with;

assign output = inputA + inputB

This is way less fun to build, but does the exact same in the simulation and is WAYYYYY faster.

My question is this;

lets say a company is prototying an ALU on an FPGA,

would they do what I did and spend a lot of time on the structural design? or would they simply use the higher level code for addition?

im sure there are advantages to both, but could someone tell me what they are please?

Thanks.

-Dom

hamster_nz:
Have a look at OpenSparc CPU source and see what a formally closed source high end CPU looks like...

https://opencores.org/projects/sparc64soc

ataradov:
High level code as much as possible. You will die of an old age trying to assemble X86 from NAND gates.

But you obviously follow some basic rules to help the tool out. Don't just type random stuff like it is Python. There are certain constructions tolls understand better than others.

And things like memories are instantiated manually from the fab library.

rstofer:
How do the 2 versions deal with signed, unsigned, carry I in, carry out and overflow?  Those little details are a really big deal!

BrianHG:

--- Quote from: rstofer on December 29, 2019, 06:06:37 am ---How do the 2 versions deal with signed, unsigned, carry I in, carry out and overflow?  Those little details are a really big deal!

--- End quote ---
?
Carry in:
assign Sum = in_a + in_b + carry_in - borrow_in;

reg carry out example 1:
carry_out <=( in_a + in_b)  >= (2**adder_bits);
borrow_out <= (in_a + in_b) < 0;
example 2:
carry_out <= sum[adder_bits];
borrow_out <= sum[adder_bits+1];

DSP overflow/range limiting used in for example, color space converters with programmable contrast & brightness:

         if (formula[bits+1]) result <= 0 ;  // formula returned a negative number, so set output result to 0
else if  (formula[bits+0]) result <= (2**bits) - 1 ; // formula returned a number too large, so set result to highest number
else                                        result <= formula ; // the formula is a value in between 0 and the highest possible value, make the result equal to the formula

Or, if you used the 'wire signed' or 'reg signed' or 'integer signed'.  'unsigned' is also useful for deliberate 2's compliment adaptations.

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