How to global reset xilink xc2c256 to programable state

[newit]

I have this exilink programing through SD card never success to retain memory in it's 256 macro cell after i remove the power, any one can help.

[dietert1]

Those CPLDs do not load configuration from some memory like modern FPGAs do. Configuration memory is inside the CPLD and gets written using Xilinx tools. You need a Xilinx platform cable and connect it to the JTAG interface of the CPLD.
The SD card socket in your image cannot be used. This is possible with modern FPGAs: Use partial configuration to implement configuration updates for other parts. The CPLD you show does not support that.

Regards, Dieter

Edit: Now i saw it's a repair. That is pretty much hopeless as it is specialist work. Maybe it can be done where they make those boards (initialization).

[newit]

"Xilinx platform cable and connect it to the JTAG interface of the CPLD"  Where can i get this xilinx platform cable can you find the site that selling this for me?
Thanks

[voltsandjolts]

If the xilinx cpld has failed then this pcb is scrap.
You don't have the code for it so you cannot replace the cpld or reprogram it.
The xilinx platform cable will not help you.

[newit]

If the xilinx cpld has failed then this pcb is scrap.
You don't have the code for it so you cannot replace the cpld or reprogram it.
The xilinx platform cable will not help you.

Even if I replace the exilinx chip? the code you're talking about is it the factory code or binary code, the pcb is for computerized control telescope it's control the RA(right asscencion) and DEC(declination) motor, the meade(manufacturer) has gave me the firmware update file that look like this attached picture to update firmware via Mini SD card but during update power went off, so they told me just to do the firmware update again and the best way to do is to update via Minin Sd not by USB B on the mainboard.

[voltsandjolts]

I suspect the firmware is not for this xilinx chip but for another chip on the board, perhaps a microcontroller or microprocessor of some type.
Follow the manufacturers instructions exactly and contact them again if it does not fix the problem.

[dietert1]

Can't you ask them for a working board in exchange? For them the problem is easy to fix, and the whole procedure may be cheap. Years ago we had a similar update failure with a NI GPIB-ENET100. They wanted to charge the price of a new one to get it fixed. It means NI don't fix things.

Regards, Dieter

[newit]

Can't you ask them for a working board in exchange? For them the problem is easy to fix, and the whole procedure may be cheap. Years ago we had a similar update failure with a NI GPIB-ENET100. They wanted to charge the price of a new one to get it fixed. It means NI don't fix things.

Regards, Dieter

Meade sold their company to Orion now there are no parts available at all. They start selling Orion scope now, that is the problem. By the way when i update frimware via Mini Sd card it's seem like it's is programing the sofware for half an hour then when the display show"take sd" card out and restart, then nothing come on the display.

regards
sam

[newit]

I suspect the firmware is not for this xilinx chip but for another chip on the board, perhaps a microcontroller or microprocessor of some type.
Follow the manufacturers instructions exactly and contact them again if it does not fix the problem.

The size of the file is 244MB so I think it will register to exilinx xc2c256 on it's macro cell none of other chip on board seem to hold that kind of nonvolatile memory of that size.
sam

[voltsandjolts]

I estimate the programming file for this xilinx cpld would be no more than 100KB.
Even a large microcontroller would be 1MB or so at most.
Perhaps there is some processor running linux os or such like on this board?

Did you follow the manufacturer's instructions for programming?

[voltsandjolts]

I found your other post about this device here:
https://www.eevblog.com/forum/fpga/need-help-exilink-xc2c256-vqg100-c-and-adsp-bf531/

The pictures you linked there seem to show a tssop flash device U5 (adjacent to the disconnected supercap??? why is that disconnected?).
This flash chip is probably where the new firmware is being stored.
https://postimg.cc/xcmfTH8Z

The unit might also require the SD card to remain plugged in, so the processor can read other (map?) data from it when required.

[thinkfat]

The CPLD is not very likely to fail or lose its programming through a firmware update, even if interrupted. It's also not likely to be reprogrammed at all during a firmware update even though I would not rule that out completely. But you will not know until you diagnose the actual issue precisely.

IF the CPLD is actually programmed during a firmware update, then replacing it might be feasible. But you will need to do a little reverse-engineering of the schematic to find out: Get the CPLD datasheet, see where the programming pins are (this type of CPLD is programmed via JTAG, so you will need to find the pins labeled "TDI", "TDO", "TCK" and "TMS") and if they're connected to the actual processor. This will mean it's at least possible for the processor to reprogram the CPLD. It doesn't mean this is actually happening during a firmware update, though.

[newit]

I found your other post about this device here:
https://www.eevblog.com/forum/fpga/need-help-exilink-xc2c256-vqg100-c-and-adsp-bf531/

The pictures you linked there seem to show a tssop flash device U5 (adjacent to the disconnected supercap??? why is that disconnected?).
This flash chip is probably where the new firmware is being stored.
https://postimg.cc/xcmfTH8Z

The unit might also require the SD card to remain plugged in, so the processor can read other (map?) data from it when required.

Hi
That U5 chip store audio and video introduction of solar system stars and deep sky object through it's own built in speaker and monitor though, it's an audio video by the telescope's manufacturer narrator for about 45 minutes.
I think the system boot rom instruction is missing that's why it won't boot after firmware update.

[newit]

The CPLD is not very likely to fail or lose its programming through a firmware update, even if interrupted. It's also not likely to be reprogrammed at all during a firmware update even though I would not rule that out completely. But you will not know until you diagnose the actual issue precisely.

IF the CPLD is actually programmed during a firmware update, then replacing it might be feasible. But you will need to do a little reverse-engineering of the schematic to find out: Get the CPLD datasheet, see where the programming pins are (this type of CPLD is programmed via JTAG, so you will need to find the pins labeled "TDI", "TDO", "TCK" and "TMS") and if they're connected to the actual processor. This will mean it's at least possible for the processor to reprogram the CPLD. It doesn't mean this is actually happening during a firmware update, though.

For now I think the system's boot rom instruction is missing or corrupted that 's why it won't boot up. I replace the chip Exilinx do I need the code to enter into programming CPLD? For now I don't know where is the boot rom instruction located.

[newit]

I estimate the programming file for this xilinx cpld would be no more than 100KB.
Even a large microcontroller would be 1MB or so at most.
Perhaps there is some processor running linux os or such like on this board?

Did you follow the manufacturer's instructions for programming?

I suspect the digital to analog chip blackfin processor made by Analog device ADSP-BF531-Sbstz400 also the UART can't communicate to the mainboard using telescope application autostar that it's provided.