GAL16V8D in a hurry

[NivagSwerdna]

Hi, 

I bought some "LATTICE DIP-20 GAL16V8D-15LP" on EBAY as although these are obsolete I thought they could work for a small piece of glue logic for a 5V retro project.

I just need a simple combinatorial design.... which s/w package should I use?  ispLever seems to be Lattice but is a monster.  Is there something leaner and meaner?

I have a TL866... will that work for programming these?  again which s/w would be best?

Thanks in advance

[NivagSwerdna]

I found WinCUPL here... https://www.microchip.com/design-centers/fpgas-and-plds/splds-cplds/pld-design-resources  but it doesn't seem to have a definition for anything other than Atmel devices?  Where could I find a version that has 16V8D?

[mikeselectricstuff]

AFAIR, all 16V8's are the same for the logic design - the suffix is just for the speed and possibly programming algorithm variants, so using ATF16V8 in WinCupl will probably produce a compatible JEDEC file for GAL16V8

[NivagSwerdna]

I downloaded ispLEVER earlier and had a play over lunch...  The ABEL HDL doesn't seem too hard and there is an example which is pretty close to what I want... so I might go with the sledge hammer approach...

Code: [Select]

module decode
title 'memory decode'
 A15,A14,A13,A12,A11 pin;
 ROM1,IO,ROM2,ROM3, RAM pin istype 'com';
 H,L,X = 1,0,.X.;
 Address = [A15,A14,A13,A12, A11,X,X,X, X,X,X,X, X,X,X,X];
equations
 !RAM = (Address < ^h8000);
 !ROM1 = (Address >= ^h9000) & (Address < ^hE000);
 !ROM2 = (Address >= ^hE000) & (Address <= ^hE7FF);
 !IO = (Address >= ^hE800) & (Address <= ^hEFFF);
 !ROM3 = (Address >= ^hF000);
test_vectors
 (Address -> [ROM1,ROM2,ROM3,IO,RAM])
 ^h0000 -> [ H, H, H, H, L ];
 ^h4000 -> [ H, H, H, H, L ];
 ^h8000 -> [ H, H, H, H, H ];
 ^hC000 -> [ L, H, H, H, H ];
 ^hE000 -> [ H, L, H, H, H ];
 ^hE800 -> [ H, H, H, L, H ];
 ^hF000 -> [ H, H, L, H, H ];
 ^hF800 -> [ H, H, L, H, H ];
end



[up8051]

You can use old PALASM
https://en.wikipedia.org/wiki/PALASM

For 16V8 chips select PALCE16V8.

[madires]

Open Source: GALasm (https://github.com/daveho/GALasm)

[mikeselectricstuff]

You can use old PALASM
https://en.wikipedia.org/wiki/PALASM

For 16V8 chips select PALCE16V8.

Unless PALASM changed a lot since I started using CUPL, there's a big difference between Palasm and CUPL - CUPL is much more high level and useful - from what I recall PALASM is only a step above manually creating fuse maps, whearas CUPL has logic reduction , buses and other high-level features

[oPossum]

I have been using ispLever for GALs so I can use VHDL. I prefer that over ABEL/CUPL/PALASM.

[marcopolo]

Try EZ-ABEL 

https://www.eevblog.com/forum/fpga/looking-for-easy-abel-v4-x-documentation/

I just done a VGA Sync generator with it without any problem.

Marc

[TomS_]

My understanding is similar to mikeselectricstuff, WinCUPL can generate a JEDEC file that should work on devices other than ATMELs own. If you have a TL866 you can try it easily enough.

WinCUPL has a bit of a learning curve and some quirks to get used to.

[maithon]

I use abel to complie and simulate this gal16v8d in winxp dos mode.

[Picuino]

If the glue logic is simple, you can use too a PIC microcontroller with CLCs (Configurable Logic Cells).
https://www.microchip.com/design-centers/8-bit/peripherals/core-independent/configurable-logic-cell
Simple and cheap devices like PIC16F15324 have 4 configurable logic cells very flexible.
With the Peripheral pin select function you can asign inputs and outputs to any Pin of the chip.