Lattice CrossLink NX EVB Clocking w/higher speed clocks

[jlcordar]

Hi,

I bought a Lattice CrossLink NX EVB (LIFCL-40-9BG400C) to try it out and do some MIPI D-PHY experiments, and to learn about Lattice FPGAs.  I completed the 'hello world' tutorial which uses on onboard [the FPGA] +/- 12% RC oscillator.  I did a simple blinky LED/SPI project clocked by the FTDI 12MHz oscillator.  Unfortunately, for projects that require higher speed + tighter ppm clocks, the PLL minimum input frequency is 18MHz so I can't use the FTDI 12MHz clock, I need a higher-speed clock.  The documentation says the PLL should be fed by a dedicated PLL pin for best performance.  OK.  U4 is a 125MHz LVDS Abracon oscillator.  I think that this is connected to the dedicated PLLCLK pin.  I cannot figure out how to configure the device to accept U4's LVDS as the clock.  Does anybody have any advice/can point to example project or code? I looked around for examples, there are not a lot for this board, and no Lattice forum .  I can always run a semirigid to a deadbugged LVCMOS oscillator but I would rather not do that just yet on a board I paid $130 for.

thanks,
Jay

[jlcordar]

Lattice tech support told me U4 (LVDS 125MHz clock) is intended for Ethernet SerDes applications, and the only other clock on this board besides the internal is the 12MHz FTDI clock.  So I would need to connect an external clock to pin 1 of JP2.  I will ask them if I can just turn the Ethernet SerDes on and just use it for the clock.