Electronics > FPGA

Mico32 on Altera FPGA with debug? Asking too much?


Currently I feel Mico32 is the most convenient soft core out there for free as is has a nice GUI through eclipse for both soft core and software development. I'm a long term Altera user and not too interested in switching but I don't want to pay for the NIOS II. Currently to use the Mico32 I generate the HDL write the software, compile, convert the output and add it into my HDL. This is a long winded process that isn't viable for big projects. Does anyone have any experience in using JTAG (through GPIO or host JTAG) to configure and debug the Mico32 in a non Lattice FPGA?


Sorry, I don't know, but I'l be interested to see what you come up  with, I have meant to play with the Mico32 myself when I get a chance.

I thought the NIOS II was 'free' depending on what version of the Quartus / embedded tools you use (e.g. not necessarily the free version) and also could be bought for like $500 as an add-on even to the free Quartus if you don't want the non-free Quartus & other tools.
In any case I thought it was royalty free and a permanent license to use the core so you buy it once and use it forever unless you need to buy a license to use some future major revision of the IP that isn't covered by the term of the license / support you got at first.
Also I think you can use full  NIOS II free for evaluation as long as your target is connected to a PC debugger or if not then it runs for like an hour and then you have to reboot the FPGA to restart it.
There is a "fully embedded" mini NIOS II version that you can use totally free but it doesn't have all the features of the full NIOS II core like external memory buses and full core performance / configurability.  And of course NIOS II is not portable to other FPGAs.

So, yes, Mico32 is interesting.  I would think that the MilkyMist people or some project on OpenCores would have published the details if there were especially good debugging setups for the Mico32.  Or there's always the Altera forumss if you don't get your answer here.


I think that ARM is offering Cortex-M0 for free (as in beer) for playing around and at a reduced cost for commercialization. That one comes with fantastic support though. And you would be able to use any OpenOCD-compatible debug probe to program and debug it (if you gave it the SWJ-DAP option instead of the simpler SW-DAP that requires SWD. In fact you can even try internally chaining the SWJ-DAP into the JTAG pins of the FPGA so your USB Blaster can go immediately from Quartus to Eclipse for debugging.

However I doubt if the smaller FPGAs can even take half of it though.

Also to mention that ARM would give you the Verilog version of M0 without debug at no cost and you can implement it in almost any FPGA and use keil to compile the code for it,

Cortex M is the best option for embedded with lots of supporting software, I think anything else would be shooting yourself in your foot considering that we have 0.6USD Cortex devices from ST and others. Also if you are interested I can supply you the ST parts @ 0.6USD to you.


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