New FPGAs from Renesas

[LostTime77]

I have not had the pleasure of playing with the software associated with the GreenPAKs or the Forge FPGAs yet, as I just really dug into them this past year. I knew about the GreenPAKs awhile ago, but my new job has direct application for them. Unfortunately, we just have not gotten to the point of actually buying chips and developing with them.

I was under the impression that the new GreenPAK software suite or whatever could already do HDL? Otherwise, the information that I have says you can develop for the new FPGAs in "HDL". I didn't know what HDL was referring to, so I specifically asked what they would be supporting: verilog, VHDL 2008, etc.. Have not gotten a response yet on that one. I am a VHDL guy myself. I can develop with the old VHDL versions, but I really enjoy / want to use at least VHDL 2008. PLD implementation is not my main occupation like it is for some people, I only do it on the side as my projects require it.

[ataradov]

Was LostTime77 a salesman from Renesas or something? He sure sounded like one.

Edit: I've got email from LostTime77:

I am LostTIme77, and I am not sure what my username appears like on your end. There is probably “banned” somewhere. No, I am not a Renesas rep, I am genuinely just a very passionate / excited engineer especially towards the new FPGA situation. It’s unfortunate that sometimes you may look like a marketer if your views are biased one way. However, I believe my views are not biased and are based on fact. Dialog has some new parts coming out that I believe are vastly superior in a use case of mine and in this particular niche segment. Regardless, I will try and tone it down a bit in any subsequent posts.
 
As to why I am banned. There seems to be issues / bugs in the forums still or they are just cautious. I went to change my account email after my last post, because I noticed it was using an old email. After the change, it deactivated my account and asked me to reactivate it, so I tried. When I logged in, it said my account was banned. Not sure why. I am reaching out to eevblog-official. However, the last time I reached out to them for an issue, it took them 2 weeks to respond. Therefore, I won’t be able to post again for a while.

[gnuarm]

I had a problem like that in the Tesla forums.  I was giving my views on the stock price and because I was not a cheerleader a bunch of members jumped on me accusing me of being a short, etc.  One of them reported me for spamming which made no sense as that is promotion of a product and I promoted nothing.  I was banned.  I could not get on to communicate with anyone who might explain to me what happened, so I created a second account to contact them.  When I acknowledged having a second account (pretty hard not to in that case) they banned me for having two accounts!  WTF!!!??? 

So of course, I created a third, fourth and fifth accounts lol!  Members in the Tesla forums really don't like when you say *anything* negative even if it's your personal experience with repair work.  The funny thing is eventually I stopped posting there for a year or so and when I returned things had changed.  Most importantly, the original account was no longer banned and I can use it now.  Go figure!

Sounds like something along these lines happened to LostTIme77.  Sometimes admins can make mistakes too.  Sometimes they are honest mistakes.  Other times an admin can let the power go to his/her head.

[Cerebus]

I had a problem like that in the Tesla forums.  I was giving my views on the stock price and because I was not a cheerleader a bunch of members jumped on me accusing me of being a short, etc.

Well, judging from your photo in your avatar you're only about 18" tall so was it an unfair observation? 

Sounds like something along these lines happened to LostTIme77.  Sometimes admins can make mistakes too.  Sometimes they are honest mistakes.  Other times an admin can let the power go to his/her head.

In this case I don't think it has anything to do with human admin actions but with the horrifically buggy nature of the SMF forum software. "The computer said no" rather than Dave, or Simon, or Halcyon actively doing something to make it happen. I've flagged ataradov's message for moderator attention with a request for help.

[Simon]

I'm not aware of losttime77 or any reports but as far as I know SMF is not that buggy that people get randomly banned. I can't say much as I am under NDA* but what little I can share is that his email address would get me suspicious.......

I'll leave the report as open so that Dave and Halcyon become aware when they are next on.

*Obviously as moderator I can see email addresses but basic common sense not to mention GDPR or local equivalents mean I cannot divulge personal contact details.

[Cerebus]

Cool, thanks for taking a look Simon.

[up8051]

Any new information on chip availability?

[free_electron]

The website mentions GreenPak. those are Silego devices. ( mixed signal FPGA ) ... interesting

[chris_leyson]

Silego were acquired by Dialog Semiconductor. GreenPAK devices offer about 25 CLBs at most and most of them have only two or three inputs. There is a lot of useful analog functionality and external digital communications is limited to SPI or similar, no serial  UART hardware available. Still interesting devices.

[free_electron]

i know . i have used many silego parts in the past.
what i meant is: it is interesting that silego -> dialog -> renesas and all of a sudden now we have fpgas ...

[gnuarm]

I had a problem like that in the Tesla forums.  I was giving my views on the stock price and because I was not a cheerleader a bunch of members jumped on me accusing me of being a short, etc.

Well, judging from your photo in your avatar you're only about 18" tall so was it an unfair observation? 

Actually, that's is pretty funny.  lol

[gnuarm]

The website mentions GreenPak. those are Silego devices. ( mixed signal FPGA ) ... interesting

One downside, or maybe an upside, is that the devices are intended to be factory programmed.  Maybe they've changed some of this, but I don't know that they support anything other than lab programming. 

Now that I think about it, this might make the devices useful security chips to prevent your board from being counterfeited.

[kleiner Rainer]

One downside, or maybe an upside, is that the devices are intended to be factory programmed.  Maybe they've changed some of this, but I don't know that they support anything other than lab programming. 

Now that I think about it, this might make the devices useful security chips to prevent your board from being counterfeited.

Some are in system (re-)programmable via I2C due to an internal EEPROM: SLG46824, SLG46826 and SLG47004.

I already did a design with SLG46826 - its nice to reprogram on the fly with the design kit. My use was as a reset controller / power supply monitor and on/off controller for an SBC, with status display via duo LEDs in the on/off button. Setting UVLO levels and delays for different voltage rails is easy: simply select a voltage divider with sensible levels and fine-tune the comparator thresholds in 32mV steps via programming. No soldering, no pots. Adjusting delays is equally easy. Just change a register and test.

The OTP versions can be used for development as long as you write the resulting design file into RAM, not OTPROM. This requires a connection to the programming pins and the development board, and keep in mind that powering down the application board clears the RAM. The design can then be burned into the chip when everything works.

Greetings,

Rainer

[uer166]

One downside, or maybe an upside, is that the devices are intended to be factory programmed.  Maybe they've changed some of this, but I don't know that they support anything other than lab programming. 

Now that I think about it, this might make the devices useful security chips to prevent your board from being counterfeited.

Some are in system (re-)programmable via I2C due to an internal EEPROM: SLG46824, SLG46826 and SLG47004.

I already did a design with SLG46826 - its nice to reprogram on the fly with the design kit. My use was as a reset controller / power supply monitor and on/off controller for an SBC, with status display via duo LEDs in the on/off button. Setting UVLO levels and delays for different voltage rails is easy: simply select a voltage divider with sensible levels and fine-tune the comparator thresholds in 32mV steps via programming. No soldering, no pots. Adjusting delays is equally easy. Just change a register and test.

The OTP versions can be used for development as long as you write the resulting design file into RAM, not OTPROM. This requires a connection to the programming pins and the development board, and keep in mind that powering down the application board clears the RAM. The design can then be burned into the chip when everything works.

Greetings,

Rainer

Cool devices, I've looked into doing some SMPS controllers (or use them as part of a sub-circuit), but found that they had quite limited functionality that could be reproduced with ~3 chips anyway, sort of like GALs that were not worth it in the end. I think they would be a good fit for FMEA designs where you have the pin-to-pin short test cases, and keeping IC count down helps immensely.

[gnuarm]

FMEA?

[josuah]

The big news head-up says "Q2 2022".

The problem with Financial year quarters is they are different on Japan.

In this announcement, Renesas announces the results for Q1 2022 at the end of April: https://www.renesas.com/sg/en/about/investor-relations/event/presentation

That would match Japanese's financial year schedule:

Estimated launch date: Aug/Sep/Oct/Nov 2022.

[mac.6]

FMEA?;;..

Failure Mode and Effect Analysis. Functional safety stuff.

[gnuarm]

The big news head-up says "Q2 2022".

The problem with Financial year quarters is they are different on Japan.

In this announcement, Renesas announces the results for Q1 2022 at the end of April: https://www.renesas.com/sg/en/about/investor-relations/event/presentation

That would match Japanese's financial year schedule:

Estimated launch date: Aug/Sep/Oct/Nov 2022.

Actually, the fiscal year is whatever the company chooses.  For example, the US government has a fiscal year of Oct to Sept.  Correspondingly, many government contractors have a fiscal year of Nov to Oct so they can include easily all the end of year and start of year government spending in their year end results. 

[josuah]

Actually, the fiscal year is whatever the company chooses.

From https://www.renesas.com/sg/en/about/investor-relations/event/presentation/archive past dates for Q2:

Financial Results for 2nd Quarter 2021 (July 29, 2021)
Financial Results for 2nd Quarter 2020 (July 30, 2020)
Financial Results for 2nd Quarter 2019 (August 6, 2019)
Financial Results for 2nd Quarter 2018 (July 31, 2018)
Financial Results for 2nd Quarter 2017 (July 28, 2017)

Indeed, before August if that follows that pattern.
There might be some more time between the release and when it is out on Walmart too.

[axemaster]

I've worked with Dialog Semiconductor microcontrollers before... their documentation is just awful. So many outright mistakes, missing information. Even worse some of the hardware architectures have truly baffling design decisions. Like being unable to wake from an RTC interrupt.

So forgive me for not being excited about these FPGAs.

[josuah]

I've worked with Dialog Semiconductor microcontrollers before... their documentation is just awful. So many outright mistakes, missing information [...]

Too bad! I was glad to see a lower-end FPGA, but the iCE40 is probably already that to some extent...

[brouhaha]

Some people have criticized the ForgeFPGA product offering for using OTP memory, but they are SRAM-based. The use of the OTP memory is optional, to support cost-sensitive production without requiring external configuration memory. The chip can be configured by loading the SRAM from an external SPI flash memory, or from a microcontroller using a SPI interface. That is very helpful in development because you don't have to throw away a bunch of OTP chips as you refine your Verilog code. The drawback is that the SPI interface takes up four of the nineteen GPIO pins, though the SPI interrface does not have to be connected after the internal SRAM is loaded.

The SLG7DVKFORGE development board is rather fancy and costs $249. It requires a socket adapter board for the specific device package (24-pin 3x3mm, or 20-pin 1.85x1.64mm). The socket adapters are $37.50, and come with 50 sample parts, so the parts are under $0.75 each even in low volume. The socket adapter board can be used by itself for prototyping, if you supply power, and have your own means of programming the chip (via SPI).

Mouser Electronics has listed the development board and the two different socket adapters for a while, with a claimed one week factory lead time. I ordered these on April 26, but don't have them yet. On April 27, Mouser sent me an order status update, changing the estimated shipment date to "Will Advise". I haven't been advised yet.

The bottom of the ForgeFPGA web page says "Find out more" with a button "Contact Us". The button is just a mailto: link, and I sent requests for a preliminary datasheet twice, on April 26th and May 4th, and have received no response. Other people have apparently been succesful at getting datasheets, including a "target" data sheet dated 2021-11-23. I'm not sure why they don't respond to me, unless it is bias against my email address, which is @gmail.com. I suppose that wouldn't surprise me, as some other semiconductor vendors, e.g. Xilinx, also do that.

[ataradov]

The device appears trivial to use. I guess $250 dev kit is a nice way to make extra cash, but I don't understand why it is necessary.

The ROM itself was not a criticism, it is actually good. As long as there is a well documented way of programming them yourself. From the marketing material and the IDE options, it looks like they want to program them on their side as a special order. It is just a guess in the absence of any real information.

It would be nice to get the actual devices and then it would be clear what they are useful for.

[brouhaha]

The $250 gets you a programmer, and some auxilliary stuff like three programmable power supplies, a digital pattern generator, an 8-channel arbitrary waveform generator, and logic analysis that might be useful for testing your design. If you already have comparable test equipment, then you won't need that.

No one said that the $250 development board is necessary, but without it you will have to come up with your own tools to download the FPGA image, and (optionally) to program the OTP. Having a programming setup that "just works" (hopefully) seems worth $250 compared to having to cobble something together; I'm sure that I could develop my own, but it would probably take a lot more than $250 worth of my time.

I'm sure there will be alternative programmers available not too long after the chips become available. All of the hardware that's needed is a USB-to-SPI interface, but existing USB-to-SPI interfaces won't likely be plug-and-play with the Renesas development software.

[josuah]

I wonder if it is frequent, or even possible to use these OTP ROM for loading a bootloader on it:

For instance, a button would switch from the FLASH chip to the OTP ROM with [EDIT: TinyFPGA's Bootloader] on it for driving an USB DFU interface, loading the user design onto the FLASH.
On next reboot, it would load the (now updated) design from FLASH as a normal operation.