Electronics > FPGA

Planning/design/review for a 6-layer Xilinx Artix-7 board for DIY computer.

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nctnico:
Why the choice for a Marvell PHY with MII interface? Documentation is hard to get for Marvell chips. I'd use a phy from TI for robustness and good documentation. I'm also missing TVS diodes on the ethernet signals.

asmi:

--- Quote from: nctnico on July 17, 2023, 08:32:43 pm ---Why the choice for a Marvell PHY with MII interface? Documentation is hard to get for Marvell chips. I'd use a phy from TI for robustness and good documentation. I'm also missing TVS diodes on the ethernet signals.

--- End quote ---
This was one of chips I've managed to stock up on during chipageddon, so I'm using what I have on hand. That said, this specific device has a very good public datasheet, the only thing I don't like about it is that it only works at Vccio of 2.5/3.3 V, while I would rather prefer it to work across 1.8/2.5/3.3 V like many other 1G Ethernet PHYs do.

nctnico:
Fair enough. IIRC I have come across this phy in one of my customers' designs and I did ran into needing info that was not in the datasheet. But it could be a different Marvell phy though.

Also not sure whether it is a good idea to route the ethernet signals on the top layer if the shield of the ethernet connector isn't well defined. If it reaches to the board, it could short the traces.

As a general rule, I like to place al capacitors with a polarity in the same direction. Makes it easy to spot mistakes and thus increase production reliability. Especially for tantalum this is important. I had one that was mounted in reverse explode in my face at some point.

asmi:

--- Quote from: nctnico on July 17, 2023, 08:51:35 pm ---Fair enough. IIRC I have come across this phy in one of my customers' designs and I did ran into needing info that was not in the datasheet. But it could be a different Marvell phy though.
--- End quote ---
Yeah, they don't have public datasheet for some of their devices, but this isn't one of them. The datasheet actually covers 4 different devices 88E1510/88E1518/88E1512/88E1514, which are quite similar but offering different features (like some of them provide MDI only to copper, others also to optic).


--- Quote from: nctnico on July 17, 2023, 08:51:35 pm ---Also not sure whether it is a good idea to route the ethernet signals on the top layer if the shield of the ethernet connector isn't well defined. If it reaches to the board, it could short the traces.

--- End quote ---
That's a good point, though in my case the part of connector where pins come out is made of plastic, so I should be safe.


--- Quote from: nctnico on July 17, 2023, 08:51:35 pm ---As a general rule, I like to place al capacitors with a polarity in the same direction. Makes it easy to spot mistakes and thus increase production reliability. Especially for tantalum this is important. I had one that was mounted in reverse explode in my face at some point.
--- End quote ---
It's not always possible to place all parts the way you want and keep layout somewhat compact. And since space on multilayer boards is expensive and forces me to prioritize compactness, I've learnt to check and double- and triple check everything before AND after reflow before powering up.

Thanks for taking some time to review the schematics!

Gribo:
The capacitors for the ethernet XTAL are a bit off. 20pF CL crystal requires ~27pF for each the capacitors - they are in series and 0402 has ~1pF parasitic capacitance per pad.

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