If anybody is looking for an intermediate project, or maybe one for their GitHub portfolio...
The MMCM block on the Artix 7 has a fine phase shift adjust. It shifts 1/32nd of the VCO frequency.
With a VCO frequency 0f 600MHz, that is about 50ps per shift, with a 1200MHz that is 25ps. You can shift about once every dozen of the phase shift control clock, allowing you to pull/push the VCO about 390kHz, and when divided down to 100MHz that is about between 30kHz and 60kHz. That pull range is more than enough to cover the PPM accuracy range of a development board's on-board oscillator (usually around +/-50ppm)
So with just a GPS module and a well designed control loop, it should be quite possible to generate a 'pretty good' PPS-referenced signal (not as good as a true VC-TCXO, but still good enough to be interesting to evaluate).
I feel it is an interesting project as:
- It covers a small corner control loop theory
- Is a simple FPGA design (< 500 LUTs, maybe a 1000 lines or so of HDL)
- Makes use of an advanced FPGA feature that relatively simple to use MMCM's phase shift).
- Involves multiple clock domains and most likely a simple clock domain crossing
- Is low cost (just dev board + ~$10 GPS module)
- It is quite interesting to predict and then validate the performance of such a design
- You can use the other features of the dev board (switches, LEDs, 7-segs) to display status and trim
What do others think? Does it tickle anybody's interest?