PS DDR Init fails: 0x00FD080030 PHY GeneralStatus Register0 stucks at Deskew ERR

[LakshmiN]

Hope everyone are doing well..

We have a board with RFSoC XCZU49DR with PS DDR 4GB
We are facing an issue with PS DDR Initialization, The following address returns this:
Address: 0xFD080030 returns: 80C000FF
Which as per this register map: Zynq UltraScale+ Devices Register Reference
it is some Deskew done of read and write/ Eye training done error is showing.

We have measured all the DDR Voltage and CLK seems to be fine. Is out of reset.


Xilinx LINK: https://support.xilinx.com/s/question/0D54U000064Z0i1SAC/ps-ddr-init-fails-0x00fd080030-phy-general-status-register-0-stucks-at-deskew-done?language=en_US

Updates:
We have tried reflow of DDR
We have tried reflow of FPGA
We have replaced the DDR, below are the observation after replacing the DDR, Still the same, Address 0xFD080030  returns different value of 808000FF

DDR part: MT40A1G16RC-062E IT:B (Micron)
      
Any suggestions would be appreciated. Thanks.

[LakshmiN]

Any suggestions? would be helpful.

[miken]

Are the working boards (mentioned on the Xilinx forum) the same design, or different design?

[LakshmiN]

They are of same design.

[miken]

Googling suggests a JTAG integrity problem. Try lowering the JTAG frequency.

Beyond that, I only have speculation from afar. PCB variation? PDN? It's good that you want to find the root cause but at some point you have to decide whether it's worth the time. Some problems are hard to disentangle. If you know you put in a lot of design effort in a particular area and it's thoroughly understood, then start by looking elsewhere. Or, sometimes a fresh pair of eyes will turn up something that was overlooked.