PS PL Communication using AXI DMA and FreeRTOS on zynq arty z7-20

[pepep]

Hello everyone!
I'm new to FPGAs but i have worked in software. I have to create a project for an application and i need to configure the PS PL communication for it.
I'm using FreeRTOS on my board and in the ARM i have developed the code that does the processing i need to.
I have configured an echo server using the examples in Vitis and i send data via ethernet to the board. I then parse the data, make some calculations and then i ready them for dispatch. I need to send them to the FPGA but i don't know how i need to connect the AXI DMA to the fabric.
I want to notify the FPGA when the packet is ready and the FPGA to go and read the data. I'm stuck!

For start i think i could do a simpler project like an AND gate module and an empty application in the ARM. I will set 1 or 0 in the application and i want to feed it to the FPGA. How would i do that? How would i connect them?
Thanks in advance!