Author Topic: Recording data and using it in a verilog testbench  (Read 1116 times)

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Offline TheGreatNedTopic starter

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Recording data and using it in a verilog testbench
« on: February 27, 2020, 07:00:44 pm »
Hi,

Is it possible to record 10 cycles of a waveform (say 10000 samples) coming into my adc and then save that data for simulation purposes? I'd love to be able to simulate some dsp functions with modelsim (or maybe there's a more appropriate simulator). I'm using quartus prime.

Thank you :)
 

Offline ale500

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Re: Recording data and using it in a verilog testbench
« Reply #1 on: February 27, 2020, 07:27:46 pm »
Yes, of course.

Recording the waveform to a text file shouldn't present much of a problem as long as you have a way to get the data to the pc.

Reading the data from verilog can be done by using $fread (works a bit like fscanf), or directly into a register array using $readmemh or $readmemb.

here there is a minimal description of the available functions: https://www.hdlworks.com/hdl_corner/verilog_ref/items/SystemFileTasks.htm. I'm sure there is also some examples in fpga4fun.
 

Offline TheGreatNedTopic starter

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Re: Recording data and using it in a verilog testbench
« Reply #2 on: February 28, 2020, 02:03:39 am »
Ahh ok, I need to get a memory or hex file of my 10000 samples on pc somehow.

What would your preference be in getting the data on the pc? Based on your recommendation I guess I could try to store the data in block ram (need 10000 * 14bits = 17,500 bytes), then send the data over a UART link to a computer. Then i could simply copy the data right out of the terminal into a text file. Is this a good approach?

Or is there some magic I could do by using a nios ii processor somehow?
 

Offline ale500

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Re: Recording data and using it in a verilog testbench
« Reply #3 on: February 28, 2020, 04:10:32 pm »
If you get the data via UART, then the dump from the terminal program could be used after some "conditioning", like number formatting. I'd assume that the ADC is connected to "something" you can use to record the waveform, even an oscilloscope could help if it has something like a USB port and enough sample memory. Here you may have to elaborate a bit how you generate the signal and how you capture it. For test purposes, you can just generate the waveform in the pc with a program/script. Once the algorithms work, you can switch to work on the real signal.
 

Online ejeffrey

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Re: Recording data and using it in a verilog testbench
« Reply #4 on: February 28, 2020, 05:02:40 pm »
You can use signal tap or the in system memory editor to upload and download waveforms.
 


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