any reason why this doesn't work with FIFORAM
sample_memory samples
(
.di ({ i_adc2B_d, i_adc2A_d, i_adc1B_d, i_adc1A_d }),
//.wrusedw (actual_write_address),
.clkw (sample_write_clock),
.we (sample_write_enable),
.rst (sample_system_reset),
.do ({ o_adc2B_d, o_adc2A_d, o_adc1B_d, o_adc1A_d }),
//.addrb (sample_read_address),
.clkr (sample_read_clock),
.re (sample_read_enable)
//.ceb (1'b1)
);